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Date: Mon, 26 Nov 2018 10:02:31 +0800
From: Tiwei Bie <tiwei.bie@intel.com>
To: Kevin Traynor <ktraynor@redhat.com>
Cc: Brian Russell <brussell@brocade.com>, Luca Boccassi <bluca@debian.org>,
dpdk stable <stable@dpdk.org>
Message-ID: <20181126020231.GA16607@debian>
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<20181123102713.17309-6-ktraynor@redhat.com>
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Subject: Re: [dpdk-stable] patch 'net/virtio: fix PCI config error handling'
has been queued to stable release 18.08.1
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On Fri, Nov 23, 2018 at 10:26:10AM +0000, Kevin Traynor wrote:
> Hi,
>
> FYI, your patch has been queued to stable release 18.08.1
>
> Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
> It will be pushed if I get no objections before 11/29/18. So please
> shout if anyone has objections.
Hi,
This patch can't be backported, as it depends on some API
change in newer release.
Thanks,
Tiwei
>
> Also note that after the patch there's a diff of the upstream commit vs the patch applied
> to the branch. If the code is different (ie: not only metadata diffs), due for example to
> a change in context or macro names, please double check it.
>
> Thanks.
>
> Kevin Traynor
>
> ---
> From e0af7542c97f172f44d633389d33920b889e8b22 Mon Sep 17 00:00:00 2001
> From: Brian Russell <brussell@brocade.com>
> Date: Tue, 28 Aug 2018 11:12:40 +0100
> Subject: [PATCH] net/virtio: fix PCI config error handling
>
> [ upstream commit 49bb1f7a0ab760a0f1fb39e27c90a1cb2ad42edd ]
>
> In virtio_read_caps and vtpci_msix_detect, rte_pci_read_config returns
> the number of bytes read from PCI config or < 0 on error.
> If less than the expected number of bytes are read then log the
> failure and return rather than carrying on with garbage.
>
> Fixes: 6ba1f63b5ab0 ("virtio: support specification 1.0")
>
> Signed-off-by: Brian Russell <brussell@brocade.com>
> Signed-off-by: Luca Boccassi <bluca@debian.org>
> Reviewed-by: Tiwei Bie <tiwei.bie@intel.com>
> ---
> drivers/net/virtio/virtio_pci.c | 65 ++++++++++++++++++++++++---------
> 1 file changed, 48 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio_pci.c
> index 6bd22e54a..b6a3c80b4 100644
> --- a/drivers/net/virtio/virtio_pci.c
> +++ b/drivers/net/virtio/virtio_pci.c
> @@ -568,14 +568,16 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw)
>
> ret = rte_pci_read_config(dev, &pos, 1, PCI_CAPABILITY_LIST);
> - if (ret < 0) {
> - PMD_INIT_LOG(DEBUG, "failed to read pci capability list");
> + if (ret != 1) {
> + PMD_INIT_LOG(DEBUG,
> + "failed to read pci capability list, ret %d", ret);
> return -1;
> }
>
> while (pos) {
> - ret = rte_pci_read_config(dev, &cap, sizeof(cap), pos);
> - if (ret < 0) {
> - PMD_INIT_LOG(ERR,
> - "failed to read pci cap at pos: %x", pos);
> + ret = rte_pci_read_config(dev, &cap, 2, pos);
> + if (ret != 2) {
> + PMD_INIT_LOG(DEBUG,
> + "failed to read pci cap at pos: %x ret %d",
> + pos, ret);
> break;
> }
> @@ -587,5 +589,14 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw)
> * cap; next two bytes are the flags.
> */
> - uint16_t flags = ((uint16_t *)&cap)[1];
> + uint16_t flags;
> +
> + ret = rte_pci_read_config(dev, &flags, sizeof(flags),
> + pos + 2);
> + if (ret != sizeof(flags)) {
> + PMD_INIT_LOG(DEBUG,
> + "failed to read pci cap at pos:"
> + " %x ret %d", pos + 2, ret);
> + break;
> + }
>
> if (flags & PCI_MSIX_ENABLE)
> @@ -602,4 +613,12 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw)
> }
>
> + ret = rte_pci_read_config(dev, &cap, sizeof(cap), pos);
> + if (ret != sizeof(cap)) {
> + PMD_INIT_LOG(DEBUG,
> + "failed to read pci cap at pos: %x ret %d",
> + pos, ret);
> + break;
> + }
> +
> PMD_INIT_LOG(DEBUG,
> "[%2x] cfg type: %u, bar: %u, offset: %04x, len: %u",
> @@ -690,23 +709,35 @@ vtpci_msix_detect(struct rte_pci_device *dev)
> {
> uint8_t pos;
> - struct virtio_pci_cap cap;
> int ret;
>
> ret = rte_pci_read_config(dev, &pos, 1, PCI_CAPABILITY_LIST);
> - if (ret < 0) {
> - PMD_INIT_LOG(DEBUG, "failed to read pci capability list");
> + if (ret != 1) {
> + PMD_INIT_LOG(DEBUG,
> + "failed to read pci capability list, ret %d", ret);
> return VIRTIO_MSIX_NONE;
> }
>
> while (pos) {
> - ret = rte_pci_read_config(dev, &cap, sizeof(cap), pos);
> - if (ret < 0) {
> - PMD_INIT_LOG(ERR,
> - "failed to read pci cap at pos: %x", pos);
> + uint8_t cap[2];
> +
> + ret = rte_pci_read_config(dev, cap, sizeof(cap), pos);
> + if (ret != sizeof(cap)) {
> + PMD_INIT_LOG(DEBUG,
> + "failed to read pci cap at pos: %x ret %d",
> + pos, ret);
> break;
> }
>
> - if (cap.cap_vndr == PCI_CAP_ID_MSIX) {
> - uint16_t flags = ((uint16_t *)&cap)[1];
> + if (cap[0] == PCI_CAP_ID_MSIX) {
> + uint16_t flags;
> +
> + ret = rte_pci_read_config(dev, &flags, sizeof(flags),
> + pos + sizeof(cap));
> + if (ret != sizeof(flags)) {
> + PMD_INIT_LOG(DEBUG,
> + "failed to read pci cap at pos:"
> + " %x ret %d", pos + 2, ret);
> + break;
> + }
>
> if (flags & PCI_MSIX_ENABLE)
> @@ -716,5 +747,5 @@ vtpci_msix_detect(struct rte_pci_device *dev)
> }
>
> - pos = cap.cap_next;
> + pos = cap[1];
> }
>
> --
> 2.19.0
>
> ---
> Diff of the applied patch vs upstream commit (please double-check if non-empty:
> ---
> --- - 2018-11-23 10:22:54.406494254 +0000
> +++ 0006-net-virtio-fix-PCI-config-error-handling.patch 2018-11-23 10:22:54.000000000 +0000
> @@ -1,15 +1,16 @@
> -From 49bb1f7a0ab760a0f1fb39e27c90a1cb2ad42edd Mon Sep 17 00:00:00 2001
> +From e0af7542c97f172f44d633389d33920b889e8b22 Mon Sep 17 00:00:00 2001
> From: Brian Russell <brussell@brocade.com>
> Date: Tue, 28 Aug 2018 11:12:40 +0100
> Subject: [PATCH] net/virtio: fix PCI config error handling
>
> +[ upstream commit 49bb1f7a0ab760a0f1fb39e27c90a1cb2ad42edd ]
> +
> In virtio_read_caps and vtpci_msix_detect, rte_pci_read_config returns
> the number of bytes read from PCI config or < 0 on error.
> If less than the expected number of bytes are read then log the
> failure and return rather than carrying on with garbage.
>
> Fixes: 6ba1f63b5ab0 ("virtio: support specification 1.0")
> -Cc: stable@dpdk.org
>
> Signed-off-by: Brian Russell <brussell@brocade.com>
> Signed-off-by: Luca Boccassi <bluca@debian.org>