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Wed, 30 Jan 2019 04:06:24 +0000 From: Yongseok Koh To: Dekel Peled CC: Shahaf Shuler , "dev@dpdk.org" , Ori Kam , "stable@dpdk.org" Thread-Topic: [PATCH v2] net/mlx5: fix concurrent use of Tx offloads Thread-Index: AQHUt8aBHitO9KIU6EORMA8obbWt36XHMrsA Date: Wed, 30 Jan 2019 04:06:24 +0000 Message-ID: <20190130040613.GA39039@yongseok-MBP.local> References: <1548683340-26470-1-git-send-email-dekelp@mellanox.com> <1548761276-62740-1-git-send-email-dekelp@mellanox.com> In-Reply-To: <1548761276-62740-1-git-send-email-dekelp@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: BYAPR02CA0011.namprd02.prod.outlook.com (2603:10b6:a02:ee::24) To DB3PR0502MB3980.eurprd05.prod.outlook.com (2603:10a6:8:10::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yskoh@mellanox.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [59.1.177.86] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; 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FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: mellanox.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: DVhSr7RtsrLdly01pLxhr3YE4Cgy5jFTxrZB42BFSb8KNX+SoziLcv0kJnvPyGdK9LFo6CZrNwbq8/4TEeXO/p76NUnckUHRRjNx7HWo0iFZxD2/wDWyDIt7gZpX89AEs5JJGGuppABdD8JJZAOhRoc2o7O56qCUTyYdXCDjlhTgEW+kj8ovw1ZLS1KslxkajK/dm4Ma1neChPIDckX52ZywkQ4BZ6YloYWvhIM0MoYnu9e4Z+5Xh30XRNAhj3RtN2mIllKCi2owcrrwM9jJeoh96X8sTvUi6QVsA0N+tGpwUMemu3j4l+s68zyHkgl0Y7JIDSI6Hzv4Q6vDRkevnZXn/TtG3NSC9bPnxOC8+SlhoVlRJayYvU8Sd/PFujeAHD6GzGrfRU1Dd3fX2Z2td299b8Oe8V35LEsem5Jqw5k= Content-Type: text/plain; charset="us-ascii" Content-ID: <3B3FCF38A8644046BBE2764876695734@eurprd05.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 18b4df43-e90e-4d4c-61ca-08d686684cb4 X-MS-Exchange-CrossTenant-originalarrivaltime: 30 Jan 2019 04:06:22.0699 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0502MB4092 Subject: Re: [dpdk-stable] [PATCH v2] net/mlx5: fix concurrent use of Tx offloads X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 30 Jan 2019 04:06:26 -0000 On Tue, Jan 29, 2019 at 01:27:56PM +0200, Dekel Peled wrote: > Original patch implemented the use of match_metadata offload in the > different burst functions. > The concurrent use of match_metadata and multi_segs offloads was > not handled. >=20 > This patch updates function txq_scatter_v(), to pass metadata value > from mbuf to wqe, when indicated by offload flags. >=20 > Fixes: 6bd7fbd03c62 ("net/mlx5: support metadata as flow rule criteria") > Cc: stable@dpdk.org >=20 > Signed-off-by: Dekel Peled >=20 > --- Not sure if the title represents this patch well. net/mlx5: fix concurrent use of Tx offloads How about, net/mlx5: fix Tx metadata for multi-segment packet > v2: Apply code review comments. > --- > --- > drivers/net/mlx5/mlx5_rxtx_vec_neon.h | 11 ++++++++--- > drivers/net/mlx5/mlx5_rxtx_vec_sse.h | 11 +++++++---- > 2 files changed, 15 insertions(+), 7 deletions(-) >=20 > diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h b/drivers/net/mlx5/mlx= 5_rxtx_vec_neon.h > index 883fe1b..7353457 100644 > --- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h > +++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h > @@ -104,6 +104,8 @@ > sizeof(struct mlx5_wqe) / MLX5_WQE_DWORD_SIZE; > unsigned int n; > volatile struct mlx5_wqe *wqe =3D NULL; > + bool metadata_ol =3D > + txq->offloads & DEV_TX_OFFLOAD_MATCH_METADATA ? true : false; > =20 > assert(elts_n > pkts_n); > mlx5_tx_complete(txq); > @@ -127,6 +129,9 @@ > uint8x16_t *t_wqe; > uint8_t *dseg; > uint8x16_t ctrl; > + rte_be32_t metadata =3D (metadata_ol && > + (pkts[n]->ol_flags & PKT_TX_METADATA)) ? > + pkts[n]->tx_metadata : 0; Why pkts[n] instead of buf? And indentation. rte_be32_t metadata =3D metadata_ol && (buf->ol_flags & PKT_TX_METADATA) ? buf->tx_metadata : 0; > =20 > assert(segs_n); > max_elts =3D elts_n - (elts_head - txq->elts_tail); > @@ -164,9 +169,9 @@ > ctrl =3D vqtbl1q_u8(ctrl, ctrl_shuf_m); > vst1q_u8((void *)t_wqe, ctrl); > /* Fill ESEG in the header. */ > - vst1q_u16((void *)(t_wqe + 1), > - ((uint16x8_t) { 0, 0, cs_flags, rte_cpu_to_be_16(len), > - 0, 0, 0, 0 })); > + vst1q_u32((void *)(t_wqe + 1), ((uint32x4_t){ 0, > + cs_flags << 16 | rte_cpu_to_be_16(len), > + metadata, 0 })); Indentation. vst1q_u32((void *)(t_wqe + 1), ((uint32x4_t){ 0, cs_flags << 16 | rte_cpu_to_be_16(len), metadata, 0 })); > txq->wqe_ci =3D wqe_ci; > } > if (!n) > diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5= _rxtx_vec_sse.h > index 14117c4..7b580d3 100644 > --- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h > +++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h > @@ -104,6 +104,8 @@ > sizeof(struct mlx5_wqe) / MLX5_WQE_DWORD_SIZE; > unsigned int n; > volatile struct mlx5_wqe *wqe =3D NULL; > + bool metadata_ol =3D > + txq->offloads & DEV_TX_OFFLOAD_MATCH_METADATA ? true : false; > =20 > assert(elts_n > pkts_n); > mlx5_tx_complete(txq); > @@ -125,6 +127,9 @@ > uint16_t max_wqe; > __m128i *t_wqe, *dseg; > __m128i ctrl; > + rte_be32_t metadata =3D (metadata_ol && > + (pkts[n]->ol_flags & PKT_TX_METADATA)) ? > + pkts[n]->tx_metadata : 0; rte_be32_t metadata =3D metadata_ol && (buf->ol_flags & PKT_TX_METADATA) ? buf->tx_metadata : 0; > =20 > assert(segs_n); > max_elts =3D elts_n - (elts_head - txq->elts_tail); > @@ -164,10 +169,8 @@ > ctrl =3D _mm_shuffle_epi8(ctrl, shuf_mask_ctrl); > _mm_store_si128(t_wqe, ctrl); > /* Fill ESEG in the header. */ > - _mm_store_si128(t_wqe + 1, > - _mm_set_epi16(0, 0, 0, 0, > - rte_cpu_to_be_16(len), cs_flags, > - 0, 0)); > + _mm_store_si128(t_wqe + 1, _mm_set_epi32(0, metadata, > + (rte_cpu_to_be_16(len) << 16) | cs_flags, 0)); _mm_store_si128(t_wqe + 1, _mm_set_epi32(0, metadata, (rte_cpu_to_be_16(len) << 16) | cs_flags, 0)); Thanks, Yongseok > txq->wqe_ci =3D wqe_ci; > } > if (!n) > --=20 > 1.8.3.1 >=20