From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 9814FA00E6 for ; Tue, 16 Apr 2019 16:39:20 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8EB451B4DF; Tue, 16 Apr 2019 16:39:20 +0200 (CEST) Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) by dpdk.org (Postfix) with ESMTP id E8A271B4D3 for ; Tue, 16 Apr 2019 16:39:18 +0200 (CEST) Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 54FFB87642; Tue, 16 Apr 2019 14:39:18 +0000 (UTC) Received: from rh.redhat.com (ovpn-117-214.ams2.redhat.com [10.36.117.214]) by smtp.corp.redhat.com (Postfix) with ESMTP id D18641001E92; Tue, 16 Apr 2019 14:39:16 +0000 (UTC) From: Kevin Traynor To: Joyce Kong Cc: Gavin Hu , Jerin Jacob , Konstantin Ananyev , dpdk stable Date: Tue, 16 Apr 2019 15:37:17 +0100 Message-Id: <20190416143719.21601-59-ktraynor@redhat.com> In-Reply-To: <20190416143719.21601-1-ktraynor@redhat.com> References: <20190416143719.21601-1-ktraynor@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Tue, 16 Apr 2019 14:39:18 +0000 (UTC) Subject: [dpdk-stable] patch 'rwlock: reimplement with atomic builtins' has been queued to LTS release 18.11.2 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi, FYI, your patch has been queued to LTS release 18.11.2 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 04/24/19. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Thanks. Kevin Traynor --- >From 55c7ea8fcc0b3eb07f4c7bbbf9cf60da44661861 Mon Sep 17 00:00:00 2001 From: Joyce Kong Date: Mon, 25 Mar 2019 17:14:57 +0800 Subject: [PATCH] rwlock: reimplement with atomic builtins [ upstream commit e8af2f1f11c8f35430086806988d43ff78414ba5 ] The __sync builtin based implementation generates full memory barriers ('dmb ish') on Arm platforms. Using C11 atomic builtins to generate one way barriers. Here is the assembly code of __sync_compare_and_swap builtin. __sync_bool_compare_and_swap(dst, exp, src); 0x000000000090f1b0 <+16>: e0 07 40 f9 ldr x0, [sp, #8] 0x000000000090f1b4 <+20>: e1 0f 40 79 ldrh w1, [sp, #6] 0x000000000090f1b8 <+24>: e2 0b 40 79 ldrh w2, [sp, #4] 0x000000000090f1bc <+28>: 21 3c 00 12 and w1, w1, #0xffff 0x000000000090f1c0 <+32>: 03 7c 5f 48 ldxrh w3, [x0] 0x000000000090f1c4 <+36>: 7f 00 01 6b cmp w3, w1 0x000000000090f1c8 <+40>: 61 00 00 54 b.ne 0x90f1d4 // b.any 0x000000000090f1cc <+44>: 02 fc 04 48 stlxrh w4, w2, [x0] 0x000000000090f1d0 <+48>: 84 ff ff 35 cbnz w4, 0x90f1c0 0x000000000090f1d4 <+52>: bf 3b 03 d5 dmb ish 0x000000000090f1d8 <+56>: e0 17 9f 1a cset w0, eq // eq = none Fixes: af75078fece3 ("first public release") Signed-off-by: Gavin Hu Signed-off-by: Joyce Kong Tested-by: Joyce Kong Acked-by: Jerin Jacob Acked-by: Konstantin Ananyev --- .../common/include/generic/rte_rwlock.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/lib/librte_eal/common/include/generic/rte_rwlock.h b/lib/librte_eal/common/include/generic/rte_rwlock.h index 5751a0e6d..2c284f0b5 100644 --- a/lib/librte_eal/common/include/generic/rte_rwlock.h +++ b/lib/librte_eal/common/include/generic/rte_rwlock.h @@ -65,5 +65,5 @@ rte_rwlock_read_lock(rte_rwlock_t *rwl) while (success == 0) { - x = rwl->cnt; + x = __atomic_load_n(&rwl->cnt, __ATOMIC_RELAXED); /* write lock is held */ if (x < 0) { @@ -71,6 +71,6 @@ rte_rwlock_read_lock(rte_rwlock_t *rwl) continue; } - success = rte_atomic32_cmpset((volatile uint32_t *)&rwl->cnt, - (uint32_t)x, (uint32_t)(x + 1)); + success = __atomic_compare_exchange_n(&rwl->cnt, &x, x + 1, 1, + __ATOMIC_ACQUIRE, __ATOMIC_RELAXED); } } @@ -85,5 +85,5 @@ static inline void rte_rwlock_read_unlock(rte_rwlock_t *rwl) { - rte_atomic32_dec((rte_atomic32_t *)(intptr_t)&rwl->cnt); + __atomic_fetch_sub(&rwl->cnt, 1, __ATOMIC_RELEASE); } @@ -101,5 +101,5 @@ rte_rwlock_write_lock(rte_rwlock_t *rwl) while (success == 0) { - x = rwl->cnt; + x = __atomic_load_n(&rwl->cnt, __ATOMIC_RELAXED); /* a lock is held */ if (x != 0) { @@ -107,6 +107,6 @@ rte_rwlock_write_lock(rte_rwlock_t *rwl) continue; } - success = rte_atomic32_cmpset((volatile uint32_t *)&rwl->cnt, - 0, (uint32_t)-1); + success = __atomic_compare_exchange_n(&rwl->cnt, &x, -1, 1, + __ATOMIC_ACQUIRE, __ATOMIC_RELAXED); } } @@ -121,5 +121,5 @@ static inline void rte_rwlock_write_unlock(rte_rwlock_t *rwl) { - rte_atomic32_inc((rte_atomic32_t *)(intptr_t)&rwl->cnt); + __atomic_store_n(&rwl->cnt, 0, __ATOMIC_RELEASE); } -- 2.20.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2019-04-16 15:34:27.821461788 +0100 +++ 0059-rwlock-reimplement-with-atomic-builtins.patch 2019-04-16 15:34:25.236178707 +0100 @@ -1,8 +1,10 @@ -From e8af2f1f11c8f35430086806988d43ff78414ba5 Mon Sep 17 00:00:00 2001 +From 55c7ea8fcc0b3eb07f4c7bbbf9cf60da44661861 Mon Sep 17 00:00:00 2001 From: Joyce Kong Date: Mon, 25 Mar 2019 17:14:57 +0800 Subject: [PATCH] rwlock: reimplement with atomic builtins +[ upstream commit e8af2f1f11c8f35430086806988d43ff78414ba5 ] + The __sync builtin based implementation generates full memory barriers ('dmb ish') on Arm platforms. Using C11 atomic builtins to generate one way barriers. @@ -24,7 +26,6 @@ 0x000000000090f1d8 <+56>: e0 17 9f 1a cset w0, eq // eq = none Fixes: af75078fece3 ("first public release") -Cc: stable@dpdk.org Signed-off-by: Gavin Hu Signed-off-by: Joyce Kong @@ -32,11 +33,11 @@ Acked-by: Jerin Jacob Acked-by: Konstantin Ananyev --- - .../common/include/generic/rte_rwlock.h | 29 ++++++++++--------- - 1 file changed, 15 insertions(+), 14 deletions(-) + .../common/include/generic/rte_rwlock.h | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/lib/librte_eal/common/include/generic/rte_rwlock.h b/lib/librte_eal/common/include/generic/rte_rwlock.h -index b05d85aee..31608fa2e 100644 +index 5751a0e6d..2c284f0b5 100644 --- a/lib/librte_eal/common/include/generic/rte_rwlock.h +++ b/lib/librte_eal/common/include/generic/rte_rwlock.h @@ -65,5 +65,5 @@ rte_rwlock_read_lock(rte_rwlock_t *rwl) @@ -55,48 +56,21 @@ + __ATOMIC_ACQUIRE, __ATOMIC_RELAXED); } } -@@ -96,11 +96,12 @@ rte_rwlock_read_trylock(rte_rwlock_t *rwl) - - while (success == 0) { -- x = rwl->cnt; -+ x = __atomic_load_n(&rwl->cnt, __ATOMIC_RELAXED); - /* write lock is held */ - if (x < 0) - return -EBUSY; -- success = rte_atomic32_cmpset((volatile uint32_t *)&rwl->cnt, -- (uint32_t)x, (uint32_t)(x + 1)); -+ success = __atomic_compare_exchange_n(&rwl->cnt, &x, x + 1, 1, -+ __ATOMIC_ACQUIRE, __ATOMIC_RELAXED); - } -+ - return 0; - } -@@ -115,5 +116,5 @@ static inline void +@@ -85,5 +85,5 @@ static inline void rte_rwlock_read_unlock(rte_rwlock_t *rwl) { - rte_atomic32_dec((rte_atomic32_t *)(intptr_t)&rwl->cnt); + __atomic_fetch_sub(&rwl->cnt, 1, __ATOMIC_RELEASE); } -@@ -136,7 +137,7 @@ rte_rwlock_write_trylock(rte_rwlock_t *rwl) - int32_t x; - -- x = rwl->cnt; -- if (x != 0 || rte_atomic32_cmpset((volatile uint32_t *)&rwl->cnt, -- 0, (uint32_t)-1) == 0) -+ x = __atomic_load_n(&rwl->cnt, __ATOMIC_RELAXED); -+ if (x != 0 || __atomic_compare_exchange_n(&rwl->cnt, &x, -1, 1, -+ __ATOMIC_ACQUIRE, __ATOMIC_RELAXED) == 0) - return -EBUSY; - -@@ -157,5 +158,5 @@ rte_rwlock_write_lock(rte_rwlock_t *rwl) +@@ -101,5 +101,5 @@ rte_rwlock_write_lock(rte_rwlock_t *rwl) while (success == 0) { - x = rwl->cnt; + x = __atomic_load_n(&rwl->cnt, __ATOMIC_RELAXED); /* a lock is held */ if (x != 0) { -@@ -163,6 +164,6 @@ rte_rwlock_write_lock(rte_rwlock_t *rwl) +@@ -107,6 +107,6 @@ rte_rwlock_write_lock(rte_rwlock_t *rwl) continue; } - success = rte_atomic32_cmpset((volatile uint32_t *)&rwl->cnt, @@ -105,7 +79,7 @@ + __ATOMIC_ACQUIRE, __ATOMIC_RELAXED); } } -@@ -177,5 +178,5 @@ static inline void +@@ -121,5 +121,5 @@ static inline void rte_rwlock_write_unlock(rte_rwlock_t *rwl) { - rte_atomic32_inc((rte_atomic32_t *)(intptr_t)&rwl->cnt);