From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A0064A32A1 for ; Thu, 24 Oct 2019 08:30:25 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8DFA31C21A; Thu, 24 Oct 2019 08:30:25 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id E5C511C21A; Thu, 24 Oct 2019 08:30:22 +0200 (CEST) X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 Oct 2019 23:30:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,223,1569308400"; d="scan'208";a="210274798" Received: from yexl-server.sh.intel.com (HELO localhost) ([10.67.117.17]) by orsmga002.jf.intel.com with ESMTP; 23 Oct 2019 23:30:20 -0700 Date: Thu, 24 Oct 2019 14:27:09 +0800 From: Ye Xiaolong To: alvinx.zhang@intel.com Cc: qi.z.zhang@intel.com, beilei.xing@intel.com, dev@dpdk.org, stable@dpdk.org Message-ID: <20191024062709.GJ72825@intel.com> References: <20190920105722.48921-1-alvinx.zhang@intel.com> <20191008104145.6330-1-alvinx.zhang@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20191008104145.6330-1-alvinx.zhang@intel.com> User-Agent: Mutt/1.9.4 (2018-02-28) Subject: Re: [dpdk-stable] [dpdk-dev] [PATCH v3] net/i40e: fix exception with multi-driver X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" On 10/08, alvinx.zhang@intel.com wrote: >From: Alvin Zhang > >If support-multi-driver is enabled, the global registers should not >be configured. But with the current code base, if creating a flow >with rte_flow API, the global register GLQF_FD_MSK may be changed. > >Fixes: cfdfca493cae ("net/i40e: fix multiple driver support") >Cc: stable@dpdk.org > >Signed-off-by: root The signature should be Alvin Zhang , fixed it while merging. >-- > >v3: modify codes according to the comments. >v2: modify codes according to the comments. Better to be specific about the changes you made for each version. >--- > drivers/net/i40e/i40e_flow.c | 38 +++++++++++++++++++++++++++++++------- > 1 file changed, 31 insertions(+), 7 deletions(-) > >diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c >index e902a35..f9c3183 100644 >--- a/drivers/net/i40e/i40e_flow.c >+++ b/drivers/net/i40e/i40e_flow.c >@@ -2349,6 +2349,37 @@ static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf, > if (num < 0) > return -EINVAL; > >+ if (pf->support_multi_driver) { >+ for (i = 0; i < num; i++) >+ if (i40e_read_rx_ctl(hw, >+ I40E_GLQF_FD_MSK(i, pctype)) != >+ mask_reg[i]) { >+ PMD_DRV_LOG(ERR, "Input set setting is not" >+ " supported with" >+ " `support-multi-driver`" >+ " enabled!"); >+ return -EPERM; >+ } >+ for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) >+ if (i40e_read_rx_ctl(hw, >+ I40E_GLQF_FD_MSK(i, pctype)) != 0) { >+ PMD_DRV_LOG(ERR, "Input set setting is not" >+ " supported with" >+ " `support-multi-driver`" >+ " enabled!"); >+ return -EPERM; >+ } >+ >+ } else { >+ for (i = 0; i < num; i++) >+ i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), >+ mask_reg[i]); >+ /*clear unused mask registers of the pctype */ >+ for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) >+ i40e_check_write_reg(hw, >+ I40E_GLQF_FD_MSK(i, pctype), 0); >+ } >+ > inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set); > > i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0), >@@ -2357,13 +2388,6 @@ static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf, > (uint32_t)((inset_reg >> > I40E_32_BIT_WIDTH) & UINT32_MAX)); > >- for (i = 0; i < num; i++) >- i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), >- mask_reg[i]); >- >- /*clear unused mask registers of the pctype */ >- for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) >- i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), 0); > I40E_WRITE_FLUSH(hw); > > pf->fdir.input_set[pctype] = input_set; >-- >1.8.3.1 > Reviewed-by: Xiaolong Ye Applied to dpdk-next-net-intel. Thanks.