From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id C0DC8A04C3 for ; Fri, 22 Nov 2019 15:43:06 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B7E9F91; Fri, 22 Nov 2019 15:43:06 +0100 (CET) Received: from us-smtp-1.mimecast.com (us-smtp-delivery-1.mimecast.com [207.211.31.120]) by dpdk.org (Postfix) with ESMTP id 46CEA1BE8D for ; Fri, 22 Nov 2019 15:43:05 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1574433784; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=chg78eWGfoLp6hGBH1+V0cITfHPC7xAd6+NQAdqQSGc=; b=BOYHlNWvlYFwzLId/h+PthuRSM7vgIE0u28kCFypSX7aZBqLo/HrBkrr3iYeQz7LZUZ+cH Gk/QawY/SesxqLUIavdGvsjK6mpGFlAdjZ9gV3T1i7Ggr72dI8jXo13RNVR55e1pCLtnT1 VPJ8C46SbeOVs2z8ijwGP6moPiGMahU= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-259--gFxPHjxMCWnsUdPT22jfg-1; Fri, 22 Nov 2019 09:43:01 -0500 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 4E01F801FCF; Fri, 22 Nov 2019 14:43:00 +0000 (UTC) Received: from rh.redhat.com (unknown [10.36.118.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 70C516E71A; Fri, 22 Nov 2019 14:42:59 +0000 (UTC) From: Kevin Traynor To: Shahed Shaikh Cc: dpdk stable Date: Fri, 22 Nov 2019 14:41:27 +0000 Message-Id: <20191122144131.21231-41-ktraynor@redhat.com> In-Reply-To: <20191122144131.21231-1-ktraynor@redhat.com> References: <20191122144131.21231-1-ktraynor@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-MC-Unique: -gFxPHjxMCWnsUdPT22jfg-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable Subject: [dpdk-stable] patch 'net/qede: fix RSS configuration as per new allocation method' has been queued to LTS release 18.11.6 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi, FYI, your patch has been queued to LTS release 18.11.6 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 11/29/19. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasi= ng (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/kevintraynor/dpdk-stable-queue This queued commit can be viewed at: https://github.com/kevintraynor/dpdk-stable-queue/commit/d7e289a330488f425b= 35c529905b2eeec08594f8 Thanks. Kevin. --- >From d7e289a330488f425b35c529905b2eeec08594f8 Mon Sep 17 00:00:00 2001 From: Shahed Shaikh Date: Thu, 12 Sep 2019 08:24:14 -0700 Subject: [PATCH] net/qede: fix RSS configuration as per new allocation meth= od [ upstream commit 235cbe4c22728dd70cd9f1fed4b7910d2e07983e ] With old design, RETA was configured in round-robin fashion since queue allocation was distributed across both engines alternately. Now, we need to configure RETA symmetrically on both engines since both engines have same number of queues. Fixes: 2af14ca79c0a ("net/qede: support 100G") Signed-off-by: Shahed Shaikh --- drivers/net/qede/qede_ethdev.c | 110 ++++++++------------------------- 1 file changed, 27 insertions(+), 83 deletions(-) diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.= c index de8e26f51..493d0bce0 100644 --- a/drivers/net/qede/qede_ethdev.c +++ b/drivers/net/qede/qede_ethdev.c @@ -1962,6 +1962,5 @@ int qede_rss_hash_update(struct rte_eth_dev *eth_dev, =09uint64_t hf =3D rss_conf->rss_hf; =09uint8_t len =3D rss_conf->rss_key_len; -=09uint8_t idx; -=09uint8_t i; +=09uint8_t idx, i, j, fpidx; =09int rc; =20 @@ -1997,12 +1996,16 @@ int qede_rss_hash_update(struct rte_eth_dev *eth_de= v, =09rss_params.rss_table_size_log =3D 7; =09vport_update_params.vport_id =3D 0; -=09/* pass the L2 handles instead of qids */ -=09for (i =3D 0 ; i < ECORE_RSS_IND_TABLE_SIZE ; i++) { -=09=09idx =3D i % QEDE_RSS_COUNT(eth_dev); -=09=09rss_params.rss_ind_table[i] =3D qdev->fp_array[idx].rxq->handle; -=09} -=09vport_update_params.rss_params =3D &rss_params; =20 =09for_each_hwfn(edev, i) { +=09=09/* pass the L2 handles instead of qids */ +=09=09for (j =3D 0 ; j < ECORE_RSS_IND_TABLE_SIZE ; j++) { +=09=09=09idx =3D j % QEDE_RSS_COUNT(eth_dev); +=09=09=09fpidx =3D idx * edev->num_hwfns + i; +=09=09=09rss_params.rss_ind_table[j] =3D +=09=09=09=09qdev->fp_array[fpidx].rxq->handle; +=09=09} + +=09=09vport_update_params.rss_params =3D &rss_params; + =09=09p_hwfn =3D &edev->hwfns[i]; =09=09vport_update_params.opaque_fid =3D p_hwfn->hw_info.opaque_fid; @@ -2056,59 +2059,4 @@ static int qede_rss_hash_conf_get(struct rte_eth_dev= *eth_dev, } =20 -static bool qede_update_rss_parm_cmt(struct ecore_dev *edev, -=09=09=09=09 struct ecore_rss_params *rss) -{ -=09int i, fn; -=09bool rss_mode =3D 1; /* enable */ -=09struct ecore_queue_cid *cid; -=09struct ecore_rss_params *t_rss; - -=09/* In regular scenario, we'd simply need to take input handlers. -=09 * But in CMT, we'd have to split the handlers according to the -=09 * engine they were configured on. We'd then have to understand -=09 * whether RSS is really required, since 2-queues on CMT doesn't -=09 * require RSS. -=09 */ - -=09/* CMT should be round-robin */ -=09for (i =3D 0; i < ECORE_RSS_IND_TABLE_SIZE; i++) { -=09=09cid =3D rss->rss_ind_table[i]; - -=09=09if (cid->p_owner =3D=3D ECORE_LEADING_HWFN(edev)) -=09=09=09t_rss =3D &rss[0]; -=09=09else -=09=09=09t_rss =3D &rss[1]; - -=09=09t_rss->rss_ind_table[i / edev->num_hwfns] =3D cid; -=09} - -=09t_rss =3D &rss[1]; -=09t_rss->update_rss_ind_table =3D 1; -=09t_rss->rss_table_size_log =3D 7; -=09t_rss->update_rss_config =3D 1; - -=09/* Make sure RSS is actually required */ -=09for_each_hwfn(edev, fn) { -=09=09for (i =3D 1; i < ECORE_RSS_IND_TABLE_SIZE / edev->num_hwfns; -=09=09 i++) { -=09=09=09if (rss[fn].rss_ind_table[i] !=3D -=09=09=09 rss[fn].rss_ind_table[0]) -=09=09=09=09break; -=09=09} - -=09=09if (i =3D=3D ECORE_RSS_IND_TABLE_SIZE / edev->num_hwfns) { -=09=09=09DP_INFO(edev, -=09=09=09=09"CMT - 1 queue per-hwfn; Disabling RSS\n"); -=09=09=09rss_mode =3D 0; -=09=09=09goto out; -=09=09} -=09} - -out: -=09t_rss->rss_enable =3D rss_mode; - -=09return rss_mode; -} - int qede_rss_reta_update(struct rte_eth_dev *eth_dev, =09=09=09 struct rte_eth_rss_reta_entry64 *reta_conf, @@ -2119,6 +2067,6 @@ int qede_rss_reta_update(struct rte_eth_dev *eth_dev, =09struct ecore_sp_vport_update_params vport_update_params; =09struct ecore_rss_params *params; +=09uint16_t i, j, idx, fid, shift; =09struct ecore_hwfn *p_hwfn; -=09uint16_t i, idx, shift; =09uint8_t entry; =09int rc =3D 0; @@ -2131,6 +2079,5 @@ int qede_rss_reta_update(struct rte_eth_dev *eth_dev, =20 =09memset(&vport_update_params, 0, sizeof(vport_update_params)); -=09params =3D rte_zmalloc("qede_rss", sizeof(*params) * edev->num_hwfns, -=09=09=09 RTE_CACHE_LINE_SIZE); +=09params =3D rte_zmalloc("qede_rss", sizeof(*params), RTE_CACHE_LINE_SIZE= ); =09if (params =3D=3D NULL) { =09=09DP_ERR(edev, "failed to allocate memory\n"); @@ -2138,25 +2085,8 @@ int qede_rss_reta_update(struct rte_eth_dev *eth_dev= , =09} =20 -=09for (i =3D 0; i < reta_size; i++) { -=09=09idx =3D i / RTE_RETA_GROUP_SIZE; -=09=09shift =3D i % RTE_RETA_GROUP_SIZE; -=09=09if (reta_conf[idx].mask & (1ULL << shift)) { -=09=09=09entry =3D reta_conf[idx].reta[shift]; -=09=09=09/* Pass rxq handles to ecore */ -=09=09=09params->rss_ind_table[i] =3D -=09=09=09=09=09qdev->fp_array[entry].rxq->handle; -=09=09=09/* Update the local copy for RETA query command */ -=09=09=09qdev->rss_ind_table[i] =3D entry; -=09=09} -=09} - =09params->update_rss_ind_table =3D 1; =09params->rss_table_size_log =3D 7; =09params->update_rss_config =3D 1; =20 -=09/* Fix up RETA for CMT mode device */ -=09if (ECORE_IS_CMT(edev)) -=09=09qdev->rss_enable =3D qede_update_rss_parm_cmt(edev, -=09=09=09=09=09=09=09 params); =09vport_update_params.vport_id =3D 0; =09/* Use the current value of rss_enable */ @@ -2165,4 +2095,18 @@ int qede_rss_reta_update(struct rte_eth_dev *eth_dev= , =20 =09for_each_hwfn(edev, i) { +=09=09for (j =3D 0; j < reta_size; j++) { +=09=09=09idx =3D j / RTE_RETA_GROUP_SIZE; +=09=09=09shift =3D j % RTE_RETA_GROUP_SIZE; +=09=09=09if (reta_conf[idx].mask & (1ULL << shift)) { +=09=09=09=09entry =3D reta_conf[idx].reta[shift]; +=09=09=09=09fid =3D entry * edev->num_hwfns + i; +=09=09=09=09/* Pass rxq handles to ecore */ +=09=09=09=09params->rss_ind_table[j] =3D +=09=09=09=09=09=09qdev->fp_array[fid].rxq->handle; +=09=09=09=09/* Update the local copy for RETA query cmd */ +=09=09=09=09qdev->rss_ind_table[j] =3D entry; +=09=09=09} +=09=09} + =09=09p_hwfn =3D &edev->hwfns[i]; =09=09vport_update_params.opaque_fid =3D p_hwfn->hw_info.opaque_fid; --=20 2.21.0 --- Diff of the applied patch vs upstream commit (please double-check if non-= empty: --- --- -=092019-11-22 14:36:57.390510223 +0000 +++ 0041-net-qede-fix-RSS-configuration-as-per-new-allocation.patch=092019-= 11-22 14:36:55.224148709 +0000 @@ -1 +1 @@ -From 235cbe4c22728dd70cd9f1fed4b7910d2e07983e Mon Sep 17 00:00:00 2001 +From d7e289a330488f425b35c529905b2eeec08594f8 Mon Sep 17 00:00:00 2001 @@ -5,0 +6,2 @@ +[ upstream commit 235cbe4c22728dd70cd9f1fed4b7910d2e07983e ] + @@ -12 +13,0 @@ -Cc: stable@dpdk.org @@ -20 +21 @@ -index 308588cb8..8b75ca3a7 100644 +index de8e26f51..493d0bce0 100644 @@ -23 +24 @@ -@@ -1963,6 +1963,5 @@ int qede_rss_hash_update(struct rte_eth_dev *eth_dev= , +@@ -1962,6 +1962,5 @@ int qede_rss_hash_update(struct rte_eth_dev *eth_dev= , @@ -31 +32 @@ -@@ -1998,12 +1997,16 @@ int qede_rss_hash_update(struct rte_eth_dev *eth_d= ev, +@@ -1997,12 +1996,16 @@ int qede_rss_hash_update(struct rte_eth_dev *eth_d= ev, @@ -54 +55 @@ -@@ -2057,59 +2060,4 @@ static int qede_rss_hash_conf_get(struct rte_eth_de= v *eth_dev, +@@ -2056,59 +2059,4 @@ static int qede_rss_hash_conf_get(struct rte_eth_de= v *eth_dev, @@ -114 +115 @@ -@@ -2120,6 +2068,6 @@ int qede_rss_reta_update(struct rte_eth_dev *eth_dev= , +@@ -2119,6 +2067,6 @@ int qede_rss_reta_update(struct rte_eth_dev *eth_dev= , @@ -122 +123 @@ -@@ -2132,6 +2080,5 @@ int qede_rss_reta_update(struct rte_eth_dev *eth_dev= , +@@ -2131,6 +2079,5 @@ int qede_rss_reta_update(struct rte_eth_dev *eth_dev= , @@ -130 +131 @@ -@@ -2139,25 +2086,8 @@ int qede_rss_reta_update(struct rte_eth_dev *eth_de= v, +@@ -2138,25 +2085,8 @@ int qede_rss_reta_update(struct rte_eth_dev *eth_de= v, @@ -156 +157 @@ -@@ -2166,4 +2096,18 @@ int qede_rss_reta_update(struct rte_eth_dev *eth_de= v, +@@ -2165,4 +2095,18 @@ int qede_rss_reta_update(struct rte_eth_dev *eth_de= v,