[dpdk-stable] patch 'net/mlx5: fix VLAN match for DV mode' has been queued to LTS release 18.11.7

[Kevin Traynor <ktraynor@redhat.com>]

Hi,

FYI, your patch has been queued to LTS release 18.11.7

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 02/25/20. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable-queue

This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable-queue/commit/3d79e4f2d563857344a06385ccfae412076d0704

Thanks.

Kevin.

---
From 3d79e4f2d563857344a06385ccfae412076d0704 Mon Sep 17 00:00:00 2001
From: Dekel Peled <dekelp@mellanox.com>
Date: Tue, 11 Feb 2020 13:05:11 +0200
Subject: [PATCH] net/mlx5: fix VLAN match for DV mode

[ upstream commit 00f75a40576b28aa5633d2cadd86f23c30c7d220 ]

Currently MLX5 PMD can't match on untagged packets specifically.
Tagged traffic still hits the flows intended for untagged packets.
If the flow has ETH, it will catch all matching packets, tagged
and untagged.
The solution is to use cvlan_tag bit.
If mask=1 and value=0 it matches on untagged traffic.
If mask=1 and value=1 it matches on tagged traffic.
This is the kernel implementation.

This patch updated MLX5 PMD to set cvlan_tag mask and value according
to flow rule contents.
This update is relevant when using DV flow engine (dv_flow_en=1).

See example at https://doc.dpdk.org/guides/nics/mlx5.html#limitations.

Fixes: fc2c498ccb94 ("net/mlx5: add Direct Verbs translate items")

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
---
 doc/guides/nics/mlx5.rst        |  9 +++------
 drivers/net/mlx5/mlx5_flow_dv.c | 11 +++++++++++
 2 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 6acbbca6e0..e566f44189 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -93,5 +93,6 @@ Limitations
     different virtual address in secondary process, unexpected error may happen.
 
-- Flow pattern without any specific vlan will match for vlan packets as well:
+- When using Verbs flow engine (``dv_flow_en`` = 0), flow pattern without any
+  specific VLAN will match for VLAN packets as well:
 
   When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card.
@@ -100,12 +101,8 @@ Limitations
         flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
 
-  Will only match vlan packets with vid=3. and the flow rules::
+  Will only match vlan packets with vid=3. and the flow rule::
 
         flow create 0 ingress pattern eth / ipv4 / end ...
 
-  Or::
-
-        flow create 0 ingress pattern eth / vlan / ipv4 / end ...
-
   Will match any ipv4 packet (VLAN included).
 
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 04c0a5813b..a6c9137079 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -1189,4 +1189,13 @@ flow_dv_translate_item_eth(void *matcher, void *key,
 	l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
 	*(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
+	if (eth_v->type) {
+		/* When ethertype is present set mask for tagged VLAN. */
+		MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
+		/* Set value for tagged VLAN if ethertype is 802.1Q. */
+		if (eth_v->type == RTE_BE16(ETHER_TYPE_VLAN) ||
+		    eth_v->type == RTE_BE16(ETHER_TYPE_QINQ))
+			MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag,
+				 1);
+	}
 }
 
@@ -1315,4 +1324,5 @@ flow_dv_translate_item_ipv4(void *matcher, void *key,
 	MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
 		 ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
+	MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
 }
 
@@ -1414,4 +1424,5 @@ flow_dv_translate_item_ipv6(void *matcher, void *key,
 	MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
 		 ipv6_v->hdr.proto & ipv6_m->hdr.proto);
+	MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
 }
 
-- 
2.21.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2020-02-19 15:43:50.504928425 +0000
+++ 0015-net-mlx5-fix-VLAN-match-for-DV-mode.patch	2020-02-19 15:43:49.751141587 +0000
@@ -1 +1 @@
-From 00f75a40576b28aa5633d2cadd86f23c30c7d220 Mon Sep 17 00:00:00 2001
+From 3d79e4f2d563857344a06385ccfae412076d0704 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 00f75a40576b28aa5633d2cadd86f23c30c7d220 ]
+
@@ -22 +23,0 @@
-Cc: stable@dpdk.org
@@ -27,4 +28,3 @@
- doc/guides/nics/mlx5.rst               |  9 +++------
- doc/guides/rel_notes/release_20_02.rst |  1 +
- drivers/net/mlx5/mlx5_flow_dv.c        | 11 +++++++++++
- 3 files changed, 15 insertions(+), 6 deletions(-)
+ doc/guides/nics/mlx5.rst        |  9 +++------
+ drivers/net/mlx5/mlx5_flow_dv.c | 11 +++++++++++
+ 2 files changed, 14 insertions(+), 6 deletions(-)
@@ -33 +33 @@
-index 2411fb3461..2ea4fa9546 100644
+index 6acbbca6e0..e566f44189 100644
@@ -36 +36 @@
-@@ -111,5 +111,6 @@ Limitations
+@@ -93,5 +93,6 @@ Limitations
@@ -44 +44 @@
-@@ -118,12 +119,8 @@ Limitations
+@@ -100,12 +101,8 @@ Limitations
@@ -58,10 +57,0 @@
-diff --git a/doc/guides/rel_notes/release_20_02.rst b/doc/guides/rel_notes/release_20_02.rst
-index 2d28a04ab6..3c7b5d71c0 100644
---- a/doc/guides/rel_notes/release_20_02.rst
-+++ b/doc/guides/rel_notes/release_20_02.rst
-@@ -119,4 +119,5 @@ New Features
-   * Added support for RSS using L3/L4 source/destination only.
-   * Added support for matching on GTP tunnel header item.
-+  * Removed limitation of matching on tagged/untagged packets (when using DV flow engine).
- 
- * **Add new vDPA PMD based on Mellanox devices**
@@ -69 +59 @@
-index d88daeccbc..a9bb0b4f10 100644
+index 04c0a5813b..a6c9137079 100644
@@ -72 +62 @@
-@@ -5217,4 +5217,13 @@ flow_dv_translate_item_eth(void *matcher, void *key,
+@@ -1189,4 +1189,13 @@ flow_dv_translate_item_eth(void *matcher, void *key,
@@ -79,2 +69,2 @@
-+		if (eth_v->type == RTE_BE16(RTE_ETHER_TYPE_VLAN) ||
-+		    eth_v->type == RTE_BE16(RTE_ETHER_TYPE_QINQ))
++		if (eth_v->type == RTE_BE16(ETHER_TYPE_VLAN) ||
++		    eth_v->type == RTE_BE16(ETHER_TYPE_QINQ))
@@ -86 +76 @@
-@@ -5357,4 +5366,5 @@ flow_dv_translate_item_ipv4(void *matcher, void *key,
+@@ -1315,4 +1324,5 @@ flow_dv_translate_item_ipv4(void *matcher, void *key,
@@ -92 +82 @@
-@@ -5461,4 +5471,5 @@ flow_dv_translate_item_ipv6(void *matcher, void *key,
+@@ -1414,4 +1424,5 @@ flow_dv_translate_item_ipv6(void *matcher, void *key,