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* [dpdk-stable] [PATCH] net/ice: fix queue bind MSI-X interrupt error
@ 2020-02-19 10:17 taox.zhu
  2020-02-20  6:11 ` Ye Xiaolong
  2020-02-20  9:20 ` [dpdk-stable] [dpdk-dev] " Ferruh Yigit
  0 siblings, 2 replies; 5+ messages in thread
From: taox.zhu @ 2020-02-19 10:17 UTC (permalink / raw)
  To: qiming.yang, wenzhuo.lu
  Cc: dev, beilei.xing, qi.z.zhang, xiaolong.ye, Zhu Tao, stable

From: Zhu Tao <taox.zhu@intel.com>

To bind a queue to an MSI-X interrupt, need to set some register.
The register consists of many parts, each of which has several
bits; therefore, the shift operator '<<' was used; so the operator
'<' in the code should be '<<'.

Old code adds 1 on even MSI-X interrupt vector index used by queue,
resulting in interrupt mapping error.

Fixes: 65dfc889d8 ("net/ice: support Rx queue interruption")
Cc: stable@dpdk.org

Signed-off-by: Zhu Tao <taox.zhu@intel.com>
---
 drivers/net/ice/ice_ethdev.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index 8e9369e0a..85ef83e92 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -2605,9 +2605,9 @@ __vsi_queues_bind_intr(struct ice_vsi *vsi, uint16_t msix_vect,
 	for (i = 0; i < nb_queue; i++) {
 		/*do actual bind*/
 		val = (msix_vect & QINT_RQCTL_MSIX_INDX_M) |
-		      (0 < QINT_RQCTL_ITR_INDX_S) | QINT_RQCTL_CAUSE_ENA_M;
+		      (0 << QINT_RQCTL_ITR_INDX_S) | QINT_RQCTL_CAUSE_ENA_M;
 		val_tx = (msix_vect & QINT_TQCTL_MSIX_INDX_M) |
-			 (0 < QINT_TQCTL_ITR_INDX_S) | QINT_TQCTL_CAUSE_ENA_M;
+			 (0 << QINT_TQCTL_ITR_INDX_S) | QINT_TQCTL_CAUSE_ENA_M;
 
 		PMD_DRV_LOG(INFO, "queue %d is binding to vect %d",
 			    base_queue + i, msix_vect);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [dpdk-stable] [PATCH] net/ice: fix queue bind MSI-X interrupt error
  2020-02-19 10:17 [dpdk-stable] [PATCH] net/ice: fix queue bind MSI-X interrupt error taox.zhu
@ 2020-02-20  6:11 ` Ye Xiaolong
  2020-02-20  9:20 ` [dpdk-stable] [dpdk-dev] " Ferruh Yigit
  1 sibling, 0 replies; 5+ messages in thread
From: Ye Xiaolong @ 2020-02-20  6:11 UTC (permalink / raw)
  To: taox.zhu; +Cc: qiming.yang, wenzhuo.lu, dev, beilei.xing, qi.z.zhang, stable

On 02/19, taox.zhu@intel.com wrote:
>From: Zhu Tao <taox.zhu@intel.com>
>
>To bind a queue to an MSI-X interrupt, need to set some register.
>The register consists of many parts, each of which has several
>bits; therefore, the shift operator '<<' was used; so the operator
>'<' in the code should be '<<'.
>
>Old code adds 1 on even MSI-X interrupt vector index used by queue,
>resulting in interrupt mapping error.
>
>Fixes: 65dfc889d8 ("net/ice: support Rx queue interruption")
>Cc: stable@dpdk.org
>
>Signed-off-by: Zhu Tao <taox.zhu@intel.com>
>---
> drivers/net/ice/ice_ethdev.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
>index 8e9369e0a..85ef83e92 100644
>--- a/drivers/net/ice/ice_ethdev.c
>+++ b/drivers/net/ice/ice_ethdev.c
>@@ -2605,9 +2605,9 @@ __vsi_queues_bind_intr(struct ice_vsi *vsi, uint16_t msix_vect,
> 	for (i = 0; i < nb_queue; i++) {
> 		/*do actual bind*/
> 		val = (msix_vect & QINT_RQCTL_MSIX_INDX_M) |
>-		      (0 < QINT_RQCTL_ITR_INDX_S) | QINT_RQCTL_CAUSE_ENA_M;
>+		      (0 << QINT_RQCTL_ITR_INDX_S) | QINT_RQCTL_CAUSE_ENA_M;
> 		val_tx = (msix_vect & QINT_TQCTL_MSIX_INDX_M) |
>-			 (0 < QINT_TQCTL_ITR_INDX_S) | QINT_TQCTL_CAUSE_ENA_M;
>+			 (0 << QINT_TQCTL_ITR_INDX_S) | QINT_TQCTL_CAUSE_ENA_M;
> 
> 		PMD_DRV_LOG(INFO, "queue %d is binding to vect %d",
> 			    base_queue + i, msix_vect);
>-- 
>2.17.1
>

Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>

Applied to dpdk-next-net-intel, Thanks.

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [dpdk-stable] [dpdk-dev] [PATCH] net/ice: fix queue bind MSI-X interrupt error
  2020-02-19 10:17 [dpdk-stable] [PATCH] net/ice: fix queue bind MSI-X interrupt error taox.zhu
  2020-02-20  6:11 ` Ye Xiaolong
@ 2020-02-20  9:20 ` Ferruh Yigit
  2020-02-20  9:43   ` Zhu, TaoX
  1 sibling, 1 reply; 5+ messages in thread
From: Ferruh Yigit @ 2020-02-20  9:20 UTC (permalink / raw)
  To: taox.zhu, qiming.yang, wenzhuo.lu
  Cc: dev, beilei.xing, qi.z.zhang, xiaolong.ye, stable

On 2/19/2020 10:17 AM, taox.zhu@intel.com wrote:
> From: Zhu Tao <taox.zhu@intel.com>
> 
> To bind a queue to an MSI-X interrupt, need to set some register.
> The register consists of many parts, each of which has several
> bits; therefore, the shift operator '<<' was used; so the operator
> '<' in the code should be '<<'.
> 
> Old code adds 1 on even MSI-X interrupt vector index used by queue,
> resulting in interrupt mapping error.
> 
> Fixes: 65dfc889d8 ("net/ice: support Rx queue interruption")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Zhu Tao <taox.zhu@intel.com>
> ---
>  drivers/net/ice/ice_ethdev.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
> index 8e9369e0a..85ef83e92 100644
> --- a/drivers/net/ice/ice_ethdev.c
> +++ b/drivers/net/ice/ice_ethdev.c
> @@ -2605,9 +2605,9 @@ __vsi_queues_bind_intr(struct ice_vsi *vsi, uint16_t msix_vect,
>  	for (i = 0; i < nb_queue; i++) {
>  		/*do actual bind*/
>  		val = (msix_vect & QINT_RQCTL_MSIX_INDX_M) |
> -		      (0 < QINT_RQCTL_ITR_INDX_S) | QINT_RQCTL_CAUSE_ENA_M;
> +		      (0 << QINT_RQCTL_ITR_INDX_S) | QINT_RQCTL_CAUSE_ENA_M;
>  		val_tx = (msix_vect & QINT_TQCTL_MSIX_INDX_M) |
> -			 (0 < QINT_TQCTL_ITR_INDX_S) | QINT_TQCTL_CAUSE_ENA_M;
> +			 (0 << QINT_TQCTL_ITR_INDX_S) | QINT_TQCTL_CAUSE_ENA_M;

Hi Tao,

Out of curiosity, what is the point of left shifting "0"?

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [dpdk-stable] [dpdk-dev] [PATCH] net/ice: fix queue bind MSI-X interrupt error
  2020-02-20  9:20 ` [dpdk-stable] [dpdk-dev] " Ferruh Yigit
@ 2020-02-20  9:43   ` Zhu, TaoX
  2020-02-20 10:45     ` Ferruh Yigit
  0 siblings, 1 reply; 5+ messages in thread
From: Zhu, TaoX @ 2020-02-20  9:43 UTC (permalink / raw)
  To: Yigit, Ferruh, Yang, Qiming, Lu, Wenzhuo
  Cc: dev, Xing, Beilei, Zhang, Qi Z, Ye, Xiaolong, stable

Hi Yigit, Ferruh

The original author was not found. The meaning of these bits is as follows:
ITR Index of the interrupt cause:
00b - ITR0 ; 01b - ITR1; 10b - ITR2; 11b - NoITR

I think the reason why the original author wrote this strange code is to highlight that these bits are important in this function,
he wanted to make it clear that he used ITR0 . I think it's possible, so I keep it.


BR,
Zhu, Tao


> -----Original Message-----
> From: Yigit, Ferruh
> Sent: Thursday, February 20, 2020 5:21 PM
> To: Zhu, TaoX <taox.zhu@intel.com>; Yang, Qiming
> <qiming.yang@intel.com>; Lu, Wenzhuo <wenzhuo.lu@intel.com>
> Cc: dev@dpdk.org; Xing, Beilei <beilei.xing@intel.com>; Zhang, Qi Z
> <qi.z.zhang@intel.com>; Ye, Xiaolong <xiaolong.ye@intel.com>;
> stable@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH] net/ice: fix queue bind MSI-X interrupt
> error
> 
> On 2/19/2020 10:17 AM, taox.zhu@intel.com wrote:
> > From: Zhu Tao <taox.zhu@intel.com>
> >
> > To bind a queue to an MSI-X interrupt, need to set some register.
> > The register consists of many parts, each of which has several bits;
> > therefore, the shift operator '<<' was used; so the operator '<' in
> > the code should be '<<'.
> >
> > Old code adds 1 on even MSI-X interrupt vector index used by queue,
> > resulting in interrupt mapping error.
> >
> > Fixes: 65dfc889d8 ("net/ice: support Rx queue interruption")
> > Cc: stable@dpdk.org
> >
> > Signed-off-by: Zhu Tao <taox.zhu@intel.com>
> > ---
> >  drivers/net/ice/ice_ethdev.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/net/ice/ice_ethdev.c
> > b/drivers/net/ice/ice_ethdev.c index 8e9369e0a..85ef83e92 100644
> > --- a/drivers/net/ice/ice_ethdev.c
> > +++ b/drivers/net/ice/ice_ethdev.c
> > @@ -2605,9 +2605,9 @@ __vsi_queues_bind_intr(struct ice_vsi *vsi,
> uint16_t msix_vect,
> >  	for (i = 0; i < nb_queue; i++) {
> >  		/*do actual bind*/
> >  		val = (msix_vect & QINT_RQCTL_MSIX_INDX_M) |
> > -		      (0 < QINT_RQCTL_ITR_INDX_S) |
> QINT_RQCTL_CAUSE_ENA_M;
> > +		      (0 << QINT_RQCTL_ITR_INDX_S) |
> QINT_RQCTL_CAUSE_ENA_M;
> >  		val_tx = (msix_vect & QINT_TQCTL_MSIX_INDX_M) |
> > -			 (0 < QINT_TQCTL_ITR_INDX_S) |
> QINT_TQCTL_CAUSE_ENA_M;
> > +			 (0 << QINT_TQCTL_ITR_INDX_S) |
> QINT_TQCTL_CAUSE_ENA_M;
> 
> Hi Tao,
> 
> Out of curiosity, what is the point of left shifting "0"?

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [dpdk-stable] [dpdk-dev] [PATCH] net/ice: fix queue bind MSI-X interrupt error
  2020-02-20  9:43   ` Zhu, TaoX
@ 2020-02-20 10:45     ` Ferruh Yigit
  0 siblings, 0 replies; 5+ messages in thread
From: Ferruh Yigit @ 2020-02-20 10:45 UTC (permalink / raw)
  To: Zhu, TaoX, Yang, Qiming, Lu, Wenzhuo
  Cc: dev, Xing, Beilei, Zhang, Qi Z, Ye, Xiaolong, stable

On 2/20/2020 9:43 AM, Zhu, TaoX wrote:
> Hi Yigit, Ferruh
> 
> The original author was not found. The meaning of these bits is as follows:
> ITR Index of the interrupt cause:
> 00b - ITR0 ; 01b - ITR1; 10b - ITR2; 11b - NoITR
> 
> I think the reason why the original author wrote this strange code is to highlight that these bits are important in this function,
> he wanted to make it clear that he used ITR0 . I think it's possible, so I keep it.

That is OK, thanks for clarification.

> 
> 
> BR,
> Zhu, Tao
> 
> 
>> -----Original Message-----
>> From: Yigit, Ferruh
>> Sent: Thursday, February 20, 2020 5:21 PM
>> To: Zhu, TaoX <taox.zhu@intel.com>; Yang, Qiming
>> <qiming.yang@intel.com>; Lu, Wenzhuo <wenzhuo.lu@intel.com>
>> Cc: dev@dpdk.org; Xing, Beilei <beilei.xing@intel.com>; Zhang, Qi Z
>> <qi.z.zhang@intel.com>; Ye, Xiaolong <xiaolong.ye@intel.com>;
>> stable@dpdk.org
>> Subject: Re: [dpdk-dev] [PATCH] net/ice: fix queue bind MSI-X interrupt
>> error
>>
>> On 2/19/2020 10:17 AM, taox.zhu@intel.com wrote:
>>> From: Zhu Tao <taox.zhu@intel.com>
>>>
>>> To bind a queue to an MSI-X interrupt, need to set some register.
>>> The register consists of many parts, each of which has several bits;
>>> therefore, the shift operator '<<' was used; so the operator '<' in
>>> the code should be '<<'.
>>>
>>> Old code adds 1 on even MSI-X interrupt vector index used by queue,
>>> resulting in interrupt mapping error.
>>>
>>> Fixes: 65dfc889d8 ("net/ice: support Rx queue interruption")
>>> Cc: stable@dpdk.org
>>>
>>> Signed-off-by: Zhu Tao <taox.zhu@intel.com>
>>> ---
>>>  drivers/net/ice/ice_ethdev.c | 4 ++--
>>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/net/ice/ice_ethdev.c
>>> b/drivers/net/ice/ice_ethdev.c index 8e9369e0a..85ef83e92 100644
>>> --- a/drivers/net/ice/ice_ethdev.c
>>> +++ b/drivers/net/ice/ice_ethdev.c
>>> @@ -2605,9 +2605,9 @@ __vsi_queues_bind_intr(struct ice_vsi *vsi,
>> uint16_t msix_vect,
>>>  	for (i = 0; i < nb_queue; i++) {
>>>  		/*do actual bind*/
>>>  		val = (msix_vect & QINT_RQCTL_MSIX_INDX_M) |
>>> -		      (0 < QINT_RQCTL_ITR_INDX_S) |
>> QINT_RQCTL_CAUSE_ENA_M;
>>> +		      (0 << QINT_RQCTL_ITR_INDX_S) |
>> QINT_RQCTL_CAUSE_ENA_M;
>>>  		val_tx = (msix_vect & QINT_TQCTL_MSIX_INDX_M) |
>>> -			 (0 < QINT_TQCTL_ITR_INDX_S) |
>> QINT_TQCTL_CAUSE_ENA_M;
>>> +			 (0 << QINT_TQCTL_ITR_INDX_S) |
>> QINT_TQCTL_CAUSE_ENA_M;
>>
>> Hi Tao,
>>
>> Out of curiosity, what is the point of left shifting "0"?


^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2020-02-20 10:45 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-02-19 10:17 [dpdk-stable] [PATCH] net/ice: fix queue bind MSI-X interrupt error taox.zhu
2020-02-20  6:11 ` Ye Xiaolong
2020-02-20  9:20 ` [dpdk-stable] [dpdk-dev] " Ferruh Yigit
2020-02-20  9:43   ` Zhu, TaoX
2020-02-20 10:45     ` Ferruh Yigit

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