From: Guinan Sun <guinanx.sun@intel.com>
To: dev@dpdk.org
Cc: Guinan Sun <guinanx.sun@intel.com>, stable@dpdk.org
Subject: [dpdk-stable] [PATCH v2 1/2] net/ixgbe: fix defects of macro in VF
Date: Fri, 8 May 2020 04:46:17 +0000 [thread overview]
Message-ID: <20200508044618.70535-2-guinanx.sun@intel.com> (raw)
In-Reply-To: <20200508044618.70535-1-guinanx.sun@intel.com>
The defects in the macros UPDATE_VF_STAT and UPDATE_VF_STAT_36BIT exist.
If latest is less than last, we will get wrong result.
The patch fixes the defect.
Fixes: abf7275bbaa2 ("ixgbe: move to drivers/net/")
Cc: stable@dpdk.org
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
v2 changes:
* Aligned line-continuation character "\".
---
drivers/net/ixgbe/ixgbe_ethdev.c | 32 ++++++++++++++++++++++++--------
1 file changed, 24 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index cf5f1fe70..57368c79c 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -94,6 +94,10 @@
#define IXGBE_4_BIT_MASK RTE_LEN2MASK(IXGBE_4_BIT_WIDTH, uint8_t)
#define IXGBE_8_BIT_WIDTH CHAR_BIT
#define IXGBE_8_BIT_MASK UINT8_MAX
+#define IXGBE_32_BIT_WIDTH (CHAR_BIT * 4)
+#define IXGBE_32_BIT_MASK RTE_LEN2MASK(IXGBE_32_BIT_WIDTH, uint32_t)
+#define IXGBE_36_BIT_WIDTH (CHAR_BIT * 4 + IXGBE_4_BIT_WIDTH)
+#define IXGBE_36_BIT_MASK RTE_LEN2MASK(IXGBE_36_BIT_WIDTH, uint64_t)
#define IXGBEVF_PMD_NAME "rte_ixgbevf_pmd" /* PMD name */
@@ -388,17 +392,29 @@ static int ixgbe_wait_for_link_up(struct ixgbe_hw *hw);
#define UPDATE_VF_STAT(reg, last, cur) \
{ \
uint32_t latest = IXGBE_READ_REG(hw, reg); \
- cur += (latest - last) & UINT_MAX; \
+ u64 stat = 0; \
+ if (latest >= last) \
+ stat = latest - last; \
+ else \
+ stat = (u64)((latest + \
+ ((u64)1 << IXGBE_32_BIT_WIDTH)) - last);\
+ cur += stat & IXGBE_32_BIT_MASK; \
last = latest; \
}
-#define UPDATE_VF_STAT_36BIT(lsb, msb, last, cur) \
-{ \
- u64 new_lsb = IXGBE_READ_REG(hw, lsb); \
- u64 new_msb = IXGBE_READ_REG(hw, msb); \
- u64 latest = ((new_msb << 32) | new_lsb); \
- cur += (0x1000000000LL + latest - last) & 0xFFFFFFFFFLL; \
- last = latest; \
+#define UPDATE_VF_STAT_36BIT(lsb, msb, last, cur) \
+{ \
+ u64 new_lsb = IXGBE_READ_REG(hw, lsb); \
+ u64 new_msb = IXGBE_READ_REG(hw, msb); \
+ u64 latest = ((new_msb << 32) | new_lsb); \
+ u64 stat = 0; \
+ if (latest >= last) \
+ stat = latest - last; \
+ else \
+ stat = (u64)((latest + \
+ ((u64)1 << IXGBE_36_BIT_WIDTH)) - last);\
+ cur += stat & IXGBE_36_BIT_MASK; \
+ last = latest; \
}
#define IXGBE_SET_HWSTRIP(h, q) do {\
--
2.17.1
next prev parent reply other threads:[~2020-05-08 4:58 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20200508015913.48764-1-guinanx.sun@intel.com>
2020-05-08 1:59 ` [dpdk-stable] [PATCH " Guinan Sun
2020-05-08 1:59 ` [dpdk-stable] [PATCH 2/2] net/e1000: " Guinan Sun
[not found] ` <20200508044618.70535-1-guinanx.sun@intel.com>
2020-05-08 4:46 ` Guinan Sun [this message]
2020-05-08 4:46 ` [dpdk-stable] [PATCH v2 " Guinan Sun
2020-05-18 1:24 ` Ye Xiaolong
2020-05-18 6:48 ` [dpdk-stable] [dpdk-dev] " Zhao1, Wei
2020-05-18 23:39 ` Ye Xiaolong
2020-05-19 1:01 ` Zhao1, Wei
2020-05-18 7:21 ` Zhao1, Wei
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