From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6720EA0093 for ; Tue, 19 May 2020 15:00:22 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 566DB1D625; Tue, 19 May 2020 15:00:22 +0200 (CEST) Received: from mail-wr1-f65.google.com (mail-wr1-f65.google.com [209.85.221.65]) by dpdk.org (Postfix) with ESMTP id 4E3211C239 for ; Tue, 19 May 2020 15:00:20 +0200 (CEST) Received: by mail-wr1-f65.google.com with SMTP id y3so15843505wrt.1 for ; Tue, 19 May 2020 06:00:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=oG5dfF2L2woOoc09CwqsflUQbrksxdJn3vq1GJrehmw=; b=Xwt7SBRqu/Rnq6SksmLVCEBZYo+/I/8ZpE1urkhniA0E2ktt+V2Cq6FOccW/n/+SBC MEekDxZ4qewmBZVKUKvbkKG758ErcOY/4BZAuUkkNYgxD1+d8pn7SqCqOKefiq5DHiZ0 2QMlBrmXZdsiu/brt9Y8U62Z059WssQgAr3w6RmgB0ZNQTjy/F4iZAEZoFcUjiSoHea2 TLsn0fdLZQ0PfxIsKNT7P+kfxlDN1wM9O6vPVzrVYTzUnVomywSFu5LkB3R8ilW37XU6 aGCOf4eT6HXQ2jPEX1ZI71XgwSJ4IsjdraztQBq7jIu+KyLkdUui20AEtDHQLQiGjF2T Irjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oG5dfF2L2woOoc09CwqsflUQbrksxdJn3vq1GJrehmw=; b=s6CSFACiywkoaKXWuoV7O9U2Yhf8sUCXCsmFVqpDqClJ3AYtYrA8hHG/XB7/TzneA8 rQWYbroK+C52XOxgBZgL2k8S622VuTpRkdtlu4M/tmdZkBq5hveEWFuxGP3XTQLPpYbk Pt7Vpn0z2VRsX4KMDJhFP3MNh1AzhLHWWFTRuF1lcP3wgrAjv3bmEJSXIjQRrt8gEnu4 79Uq+c78wMVfuvCSyNYgiFQOy+xKivQZoazFE2n5OMctlKZWY8qgIM/4WIDT4WD1/Dl6 QHUhKJrtlj/UzILv4JzTgPTUxbHEZXkApOpvHkwV4HZs7ifgdFIxi19xImva0aDPfGrw Q9QA== X-Gm-Message-State: AOAM532kd9acFKMZEkUIebZBcCd9DZ8YYFTtNJirKURqNbFZxb6JqOC9 +RGQPVG1Rs0VH7Zumc36LMg= X-Google-Smtp-Source: ABdhPJzEYkDOPzkVUtwNZOFWu9pmjVxHaGUdzye1C8nGQj7RxRASi2WT0cSMZz49Slhtxk9z3aqiZg== X-Received: by 2002:a5d:5710:: with SMTP id a16mr24820764wrv.209.1589893219990; Tue, 19 May 2020 06:00:19 -0700 (PDT) Received: from localhost ([88.98.246.218]) by smtp.gmail.com with ESMTPSA id s17sm3674236wmc.48.2020.05.19.06.00.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 May 2020 06:00:19 -0700 (PDT) From: luca.boccassi@gmail.com To: Nagadheeraj Rottela Cc: Akhil Goyal , dpdk stable Date: Tue, 19 May 2020 13:54:14 +0100 Message-Id: <20200519125804.104349-64-luca.boccassi@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200519125804.104349-1-luca.boccassi@gmail.com> References: <20200519125804.104349-1-luca.boccassi@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-stable] patch 'crypto/nitrox: fix CSR register address generation' has been queued to stable release 19.11.3 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi, FYI, your patch has been queued to stable release 19.11.3 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 05/21/20. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Thanks. Luca Boccassi --- >From b878b432b77ca835ffedc90b850ee61afa4ad6fb Mon Sep 17 00:00:00 2001 From: Nagadheeraj Rottela Date: Fri, 27 Mar 2020 19:12:38 +0530 Subject: [PATCH] crypto/nitrox: fix CSR register address generation [ upstream commit 76522b25b15316400aab26cc8187e19397998f53 ] If the NPS_PKT ring/port is greater than 8191 the NPS_PKT*() macros will evaluate to incorrect values due to unintended sign extension from int to unsigned long. To fix this, add UL suffix to the constants in these macros. The same problem is with AQMQ_QSZX() macro also. Coverity issue: 349899, 349905, 349911, 349921, 349923 Fixes: 32e4930d5a3b ("crypto/nitrox: add hardware queue management") Fixes: 0a8fc2423bff ("crypto/nitrox: introduce Nitrox driver") Signed-off-by: Nagadheeraj Rottela Acked-by: Akhil Goyal --- drivers/crypto/nitrox/nitrox_csr.h | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/crypto/nitrox/nitrox_csr.h b/drivers/crypto/nitrox/nitrox_csr.h index 8cd92e38be..de7a3c6713 100644 --- a/drivers/crypto/nitrox/nitrox_csr.h +++ b/drivers/crypto/nitrox/nitrox_csr.h @@ -12,18 +12,18 @@ #define NITROX_CSR_ADDR(bar_addr, offset) (bar_addr + (offset)) /* NPS packet registers */ -#define NPS_PKT_IN_INSTR_CTLX(_i) (0x10060 + ((_i) * 0x40000)) -#define NPS_PKT_IN_INSTR_BADDRX(_i) (0x10068 + ((_i) * 0x40000)) -#define NPS_PKT_IN_INSTR_RSIZEX(_i) (0x10070 + ((_i) * 0x40000)) -#define NPS_PKT_IN_DONE_CNTSX(_i) (0x10080 + ((_i) * 0x40000)) -#define NPS_PKT_IN_INSTR_BAOFF_DBELLX(_i) (0x10078 + ((_i) * 0x40000)) -#define NPS_PKT_IN_INT_LEVELSX(_i) (0x10088 + ((_i) * 0x40000)) -#define NPS_PKT_SLC_CTLX(_i) (0x10000 + ((_i) * 0x40000)) -#define NPS_PKT_SLC_CNTSX(_i) (0x10008 + ((_i) * 0x40000)) -#define NPS_PKT_SLC_INT_LEVELSX(_i) (0x10010 + ((_i) * 0x40000)) +#define NPS_PKT_IN_INSTR_CTLX(_i) (0x10060UL + ((_i) * 0x40000UL)) +#define NPS_PKT_IN_INSTR_BADDRX(_i) (0x10068UL + ((_i) * 0x40000UL)) +#define NPS_PKT_IN_INSTR_RSIZEX(_i) (0x10070UL + ((_i) * 0x40000UL)) +#define NPS_PKT_IN_DONE_CNTSX(_i) (0x10080UL + ((_i) * 0x40000UL)) +#define NPS_PKT_IN_INSTR_BAOFF_DBELLX(_i) (0x10078UL + ((_i) * 0x40000UL)) +#define NPS_PKT_IN_INT_LEVELSX(_i) (0x10088UL + ((_i) * 0x40000UL)) +#define NPS_PKT_SLC_CTLX(_i) (0x10000UL + ((_i) * 0x40000UL)) +#define NPS_PKT_SLC_CNTSX(_i) (0x10008UL + ((_i) * 0x40000UL)) +#define NPS_PKT_SLC_INT_LEVELSX(_i) (0x10010UL + ((_i) * 0x40000UL)) /* AQM Virtual Function Registers */ -#define AQMQ_QSZX(_i) (0x20008 + ((_i)*0x40000)) +#define AQMQ_QSZX(_i) (0x20008UL + ((_i) * 0x40000UL)) static inline uint64_t nitrox_read_csr(uint8_t *bar_addr, uint64_t offset) -- 2.20.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2020-05-19 13:56:21.431637024 +0100 +++ 0064-crypto-nitrox-fix-CSR-register-address-generation.patch 2020-05-19 13:56:18.295503187 +0100 @@ -1,8 +1,10 @@ -From 76522b25b15316400aab26cc8187e19397998f53 Mon Sep 17 00:00:00 2001 +From b878b432b77ca835ffedc90b850ee61afa4ad6fb Mon Sep 17 00:00:00 2001 From: Nagadheeraj Rottela Date: Fri, 27 Mar 2020 19:12:38 +0530 Subject: [PATCH] crypto/nitrox: fix CSR register address generation +[ upstream commit 76522b25b15316400aab26cc8187e19397998f53 ] + If the NPS_PKT ring/port is greater than 8191 the NPS_PKT*() macros will evaluate to incorrect values due to unintended sign extension from int to unsigned long. To fix this, add UL suffix to the constants in these @@ -11,7 +13,6 @@ Coverity issue: 349899, 349905, 349911, 349921, 349923 Fixes: 32e4930d5a3b ("crypto/nitrox: add hardware queue management") Fixes: 0a8fc2423bff ("crypto/nitrox: introduce Nitrox driver") -Cc: stable@dpdk.org Signed-off-by: Nagadheeraj Rottela Acked-by: Akhil Goyal