From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 95801A0518 for ; Fri, 24 Jul 2020 14:03:07 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8CC7B1BFE5; Fri, 24 Jul 2020 14:03:07 +0200 (CEST) Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com [209.85.221.68]) by dpdk.org (Postfix) with ESMTP id 87A111C032 for ; Fri, 24 Jul 2020 14:03:06 +0200 (CEST) Received: by mail-wr1-f68.google.com with SMTP id r4so5113218wrx.9 for ; Fri, 24 Jul 2020 05:03:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=OCcibHDr2x+kp0QBr0Vuh2+/fNc79KzabQb5hRnvQsU=; b=JALksZAUrzSetqPgcdFb2NfSL7Dpyyu0Za7nrv9ws+8Z2U9bxrUKi0X2Td5ucGQEET j/mS4cvLdNdSjTs540XRWErRO3B6JVztAU/DCOjOgkh2UL8snUrnTOXZQl+M5g9hnvbU SciyqSMUo3kDxacDfa6Y+QHjP+DO0OiVtThtl4OAzcYDvJYGa57eb58Iuw7ww0z7HfMv f8OZd5g2Jio++A1ishTbd+sATk5DHDlPgZE6Wowphlg8I8u2LXRj11yehuPpXB19JhHL RrgoMv0TYA7wcKWXIqRnhcS1Pc3FCwHrpCVakzRMgRqK6MzpiJDyQCtXTuQGr7ceuxhh xFkQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OCcibHDr2x+kp0QBr0Vuh2+/fNc79KzabQb5hRnvQsU=; b=YLtMMjMLU+d/OV6ddHwCYY7YKBwYqBxhLmocsMzWl1R8kgKiYzPFMKX1AYaDg/rLeN uj2/Hs29X3OuIZRBkpkV9DbxG9uQeDduRMuENqSlrCk4tScUPXCTX+NtGKnVsx39Vzfv uG9+ZfjK6IlVTF2pXHou88CVx4CA8d8oh88H03jEdYwRYf1GhsorG+PUBw3B0zkS+BY5 qvDtEAGwkzIB2G2r3rdxD1R2o/GXVz7a6awkUoRfGYnBKuwinuovDorWLzKoddhQw3m3 fcxE7zIGhQylWH1iwhnj+psu4kVYKcPfL9L4rVx0EBwf4qVn73axPkFw+UWQMLEuAq1+ 27ig== X-Gm-Message-State: AOAM530C456BJ4S7jynGy6UuUiE3vY9W1bABRzREHSyhNXoQa7KObc6w FAi5pSvyOJw78i5r3jAk3+Ze881EbeJnPw== X-Google-Smtp-Source: ABdhPJwQMULGFhhBrRmo0dgG0DT3h8gdvbdaJ5UZMwdkUK6Okv4vPRjQmP0X35Cy8FUumpwpc42tWQ== X-Received: by 2002:adf:dd4f:: with SMTP id u15mr8412113wrm.275.1595592186207; Fri, 24 Jul 2020 05:03:06 -0700 (PDT) Received: from localhost ([88.98.246.218]) by smtp.gmail.com with ESMTPSA id e23sm6771874wme.35.2020.07.24.05.03.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Jul 2020 05:03:05 -0700 (PDT) From: luca.boccassi@gmail.com To: Rahul Lakkireddy Cc: dpdk stable Date: Fri, 24 Jul 2020 12:57:58 +0100 Message-Id: <20200724120030.1863487-40-luca.boccassi@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200724120030.1863487-1-luca.boccassi@gmail.com> References: <20200724120030.1863487-1-luca.boccassi@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-stable] patch 'net/cxgbe: fix double MPS alloc by flow validate and create' has been queued to stable release 19.11.4 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi, FYI, your patch has been queued to stable release 19.11.4 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 07/26/20. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Thanks. Luca Boccassi --- >From 9f61da6849dfdb2e17fa23dceb3001eacceaf6c0 Mon Sep 17 00:00:00 2001 From: Rahul Lakkireddy Date: Sat, 13 Jun 2020 03:37:25 +0530 Subject: [PATCH] net/cxgbe: fix double MPS alloc by flow validate and create [ upstream commit be5f4d5ced10f9d7edc8ba4b3f1d98b9d476d367 ] The Multi Port Switch (MPS) entry is allocated twice when both flow validate and create are invoked, but only freed once during flow destroy. Avoid double alloc by moving MPS entry allocation closer to when the filter create request is sent to hardware and will be ignored for filter validate request. Fixes: fefee7a619a4 ("net/cxgbe: add flow ops to match based on dest MAC") Signed-off-by: Rahul Lakkireddy --- drivers/net/cxgbe/cxgbe_filter.c | 32 ++++++++++++++++++++++++++++++++ drivers/net/cxgbe/cxgbe_filter.h | 4 +++- drivers/net/cxgbe/cxgbe_flow.c | 28 +++------------------------- 3 files changed, 38 insertions(+), 26 deletions(-) diff --git a/drivers/net/cxgbe/cxgbe_filter.c b/drivers/net/cxgbe/cxgbe_filter.c index 8a8031cb9..07337bb4b 100644 --- a/drivers/net/cxgbe/cxgbe_filter.c +++ b/drivers/net/cxgbe/cxgbe_filter.c @@ -8,6 +8,7 @@ #include "base/t4_tcb.h" #include "base/t4_regs.h" #include "cxgbe_filter.h" +#include "mps_tcam.h" #include "clip_tbl.h" #include "l2t.h" @@ -275,9 +276,14 @@ int cxgbe_alloc_ftid(struct adapter *adap, u8 nentries) */ static void clear_filter(struct filter_entry *f) { + struct port_info *pi = ethdev2pinfo(f->dev); + if (f->clipt) cxgbe_clip_release(f->dev, f->clipt); + if (f->fs.mask.macidx) + cxgbe_mpstcam_remove(pi, f->fs.val.macidx); + /* The zeroing of the filter rule below clears the filter valid, * pending, locked flags etc. so it's all we need for * this operation. @@ -578,6 +584,19 @@ static int cxgbe_set_hash_filter(struct rte_eth_dev *dev, f->dev = dev; f->fs.iq = iq; + /* Allocate MPS TCAM entry to match Destination MAC. */ + if (f->fs.mask.macidx) { + int idx; + + idx = cxgbe_mpstcam_alloc(pi, f->fs.val.dmac, f->fs.mask.dmac); + if (idx <= 0) { + ret = -ENOMEM; + goto out_err; + } + + f->fs.val.macidx = idx; + } + /* * If the new filter requires loopback Destination MAC and/or VLAN * rewriting then we need to allocate a Layer 2 Table (L2T) entry for @@ -1015,6 +1034,19 @@ int cxgbe_set_filter(struct rte_eth_dev *dev, unsigned int filter_id, f->fs.iq = iq; f->dev = dev; + /* Allocate MPS TCAM entry to match Destination MAC. */ + if (f->fs.mask.macidx) { + int idx; + + idx = cxgbe_mpstcam_alloc(pi, f->fs.val.dmac, f->fs.mask.dmac); + if (idx <= 0) { + ret = -ENOMEM; + goto free_tid; + } + + f->fs.val.macidx = idx; + } + /* Allocate a clip table entry only if we have non-zero IPv6 address. */ if (chip_ver > CHELSIO_T5 && f->fs.type && memcmp(f->fs.val.lip, bitoff, sizeof(bitoff))) { diff --git a/drivers/net/cxgbe/cxgbe_filter.h b/drivers/net/cxgbe/cxgbe_filter.h index 06021c854..e69e9d3f5 100644 --- a/drivers/net/cxgbe/cxgbe_filter.h +++ b/drivers/net/cxgbe/cxgbe_filter.h @@ -69,8 +69,10 @@ struct ch_filter_tuple { uint16_t lport; /* local port */ uint16_t fport; /* foreign port */ + uint8_t dmac[6]; /* Destination MAC to match */ + /* reservations for future additions */ - uint8_t rsvd[12]; + uint8_t rsvd[6]; }; /* diff --git a/drivers/net/cxgbe/cxgbe_flow.c b/drivers/net/cxgbe/cxgbe_flow.c index 2fb77b4ab..1298fb12a 100644 --- a/drivers/net/cxgbe/cxgbe_flow.c +++ b/drivers/net/cxgbe/cxgbe_flow.c @@ -190,20 +190,9 @@ ch_rte_parsetype_eth(const void *dmask, const struct rte_flow_item *item, "src mac filtering not supported"); if (!rte_is_zero_ether_addr(&mask->dst)) { - const u8 *addr = (const u8 *)&spec->dst.addr_bytes[0]; - const u8 *m = (const u8 *)&mask->dst.addr_bytes[0]; - struct rte_flow *flow = (struct rte_flow *)fs->private; - struct port_info *pi = (struct port_info *) - (flow->dev->data->dev_private); - int idx; - - idx = cxgbe_mpstcam_alloc(pi, addr, m); - if (idx <= 0) - return rte_flow_error_set(e, idx, - RTE_FLOW_ERROR_TYPE_ITEM, - NULL, "unable to allocate mac" - " entry in h/w"); - CXGBE_FILL_FS(idx, 0x1ff, macidx); + CXGBE_FILL_FS(0, 0x1ff, macidx); + CXGBE_FILL_FS_MEMCPY(spec->dst.addr_bytes, mask->dst.addr_bytes, + dmac); } /* Only set outer ethertype, if we didn't encounter VLAN item yet. @@ -1085,17 +1074,6 @@ static int __cxgbe_flow_destroy(struct rte_eth_dev *dev, struct rte_flow *flow) return ctx.result; } - fs = &flow->fs; - if (fs->mask.macidx) { - struct port_info *pi = (struct port_info *) - (dev->data->dev_private); - int ret; - - ret = cxgbe_mpstcam_remove(pi, fs->val.macidx); - if (!ret) - return ret; - } - return 0; } -- 2.20.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2020-07-24 12:53:50.161782954 +0100 +++ 0040-net-cxgbe-fix-double-MPS-alloc-by-flow-validate-and-.patch 2020-07-24 12:53:48.255005863 +0100 @@ -1,8 +1,10 @@ -From be5f4d5ced10f9d7edc8ba4b3f1d98b9d476d367 Mon Sep 17 00:00:00 2001 +From 9f61da6849dfdb2e17fa23dceb3001eacceaf6c0 Mon Sep 17 00:00:00 2001 From: Rahul Lakkireddy Date: Sat, 13 Jun 2020 03:37:25 +0530 Subject: [PATCH] net/cxgbe: fix double MPS alloc by flow validate and create +[ upstream commit be5f4d5ced10f9d7edc8ba4b3f1d98b9d476d367 ] + The Multi Port Switch (MPS) entry is allocated twice when both flow validate and create are invoked, but only freed once during flow destroy. Avoid double alloc by moving MPS entry allocation @@ -10,7 +12,6 @@ will be ignored for filter validate request. Fixes: fefee7a619a4 ("net/cxgbe: add flow ops to match based on dest MAC") -Cc: stable@dpdk.org Signed-off-by: Rahul Lakkireddy --- @@ -20,7 +21,7 @@ 3 files changed, 38 insertions(+), 26 deletions(-) diff --git a/drivers/net/cxgbe/cxgbe_filter.c b/drivers/net/cxgbe/cxgbe_filter.c -index 06233e41e..317830f58 100644 +index 8a8031cb9..07337bb4b 100644 --- a/drivers/net/cxgbe/cxgbe_filter.c +++ b/drivers/net/cxgbe/cxgbe_filter.c @@ -8,6 +8,7 @@ @@ -30,8 +31,8 @@ +#include "mps_tcam.h" #include "clip_tbl.h" #include "l2t.h" - #include "smt.h" -@@ -290,12 +291,17 @@ int cxgbe_alloc_ftid(struct adapter *adap, u8 nentries) + +@@ -275,9 +276,14 @@ int cxgbe_alloc_ftid(struct adapter *adap, u8 nentries) */ static void clear_filter(struct filter_entry *f) { @@ -40,16 +41,13 @@ if (f->clipt) cxgbe_clip_release(f->dev, f->clipt); - if (f->l2t) - cxgbe_l2t_release(f->l2t); - + if (f->fs.mask.macidx) + cxgbe_mpstcam_remove(pi, f->fs.val.macidx); + /* The zeroing of the filter rule below clears the filter valid, * pending, locked flags etc. so it's all we need for * this operation. -@@ -609,6 +615,19 @@ static int cxgbe_set_hash_filter(struct rte_eth_dev *dev, +@@ -578,6 +584,19 @@ static int cxgbe_set_hash_filter(struct rte_eth_dev *dev, f->dev = dev; f->fs.iq = iq; @@ -69,7 +67,7 @@ /* * If the new filter requires loopback Destination MAC and/or VLAN * rewriting then we need to allocate a Layer 2 Table (L2T) entry for -@@ -1067,6 +1086,19 @@ int cxgbe_set_filter(struct rte_eth_dev *dev, unsigned int filter_id, +@@ -1015,6 +1034,19 @@ int cxgbe_set_filter(struct rte_eth_dev *dev, unsigned int filter_id, f->fs.iq = iq; f->dev = dev; @@ -90,7 +88,7 @@ if (chip_ver > CHELSIO_T5 && f->fs.type && memcmp(f->fs.val.lip, bitoff, sizeof(bitoff))) { diff --git a/drivers/net/cxgbe/cxgbe_filter.h b/drivers/net/cxgbe/cxgbe_filter.h -index e79c052de..46ebf8333 100644 +index 06021c854..e69e9d3f5 100644 --- a/drivers/net/cxgbe/cxgbe_filter.h +++ b/drivers/net/cxgbe/cxgbe_filter.h @@ -69,8 +69,10 @@ struct ch_filter_tuple { @@ -106,10 +104,10 @@ /* diff --git a/drivers/net/cxgbe/cxgbe_flow.c b/drivers/net/cxgbe/cxgbe_flow.c -index 166c39ba5..dd8ee7bbd 100644 +index 2fb77b4ab..1298fb12a 100644 --- a/drivers/net/cxgbe/cxgbe_flow.c +++ b/drivers/net/cxgbe/cxgbe_flow.c -@@ -194,20 +194,9 @@ ch_rte_parsetype_eth(const void *dmask, const struct rte_flow_item *item, +@@ -190,20 +190,9 @@ ch_rte_parsetype_eth(const void *dmask, const struct rte_flow_item *item, "src mac filtering not supported"); if (!rte_is_zero_ether_addr(&mask->dst)) { @@ -132,8 +130,8 @@ + dmac); } - CXGBE_FILL_FS(be16_to_cpu(spec->type), -@@ -1212,17 +1201,6 @@ static int __cxgbe_flow_destroy(struct rte_eth_dev *dev, struct rte_flow *flow) + /* Only set outer ethertype, if we didn't encounter VLAN item yet. +@@ -1085,17 +1074,6 @@ static int __cxgbe_flow_destroy(struct rte_eth_dev *dev, struct rte_flow *flow) return ctx.result; }