From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id E49ECA04B0 for ; Fri, 7 Aug 2020 14:59:23 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D599A1C0AF; Fri, 7 Aug 2020 14:59:23 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id E9E441C0BD for ; Fri, 7 Aug 2020 14:59:21 +0200 (CEST) IronPort-SDR: jbvsTnjZme+l9bK+Od71ElfGJahNSiiOLpX6o49p6ljysDOVVkOBf2vh/urS7jOjp5iu3ebjRI 44iXx+0aHv+Q== X-IronPort-AV: E=McAfee;i="6000,8403,9705"; a="140664537" X-IronPort-AV: E=Sophos;i="5.75,445,1589266800"; d="scan'208";a="140664537" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Aug 2020 05:59:20 -0700 IronPort-SDR: 6OUQRLKWYrLKZ66Gm/EzzjAbJ2Lzk9q7FJhe0V17K7oVnT8lHh6j62MaHaA34IYuGGWuD2+EaV +B+S7jlmGBkA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,445,1589266800"; d="scan'208";a="307368509" Received: from akusztax-mobl1.ger.corp.intel.com ([10.104.121.21]) by orsmga002.jf.intel.com with ESMTP; 07 Aug 2020 05:59:19 -0700 From: Arek Kusztal To: fiona.trahe@intel.com Cc: stable@dpdk.org, Arek Kusztal Date: Fri, 7 Aug 2020 14:56:58 +0200 Message-Id: <20200807125701.1764-1-arkadiuszx.kusztal@intel.com> X-Mailer: git-send-email 2.28.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-stable] [19.11 1/4] common/qat: remove tail write coalescing X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" From: Fiona Trahe [ upstream commit 6cde900bd59d00ea970be085dbe01af63050ddf9 ] The feature Coalescing Tail Writes on Enqueue is removed as it is not thread-safe and a dual-thread feature will be added shortly. Cc: stable@dpdk.org Signed-off-by: Fiona Trahe Signed-off-by: Arek Kusztal --- drivers/common/qat/qat_qp.c | 16 +++------------- drivers/common/qat/qat_qp.h | 6 ------ 2 files changed, 3 insertions(+), 19 deletions(-) diff --git a/drivers/common/qat/qat_qp.c b/drivers/common/qat/qat_qp.c index e0c174d..d189fc3 100644 --- a/drivers/common/qat/qat_qp.c +++ b/drivers/common/qat/qat_qp.c @@ -542,7 +542,6 @@ static inline void txq_write_tail(struct qat_qp *qp, struct qat_queue *q) { WRITE_CSR_RING_TAIL(qp->mmap_bar_addr, q->hw_bundle_number, q->hw_queue_number, q->tail); - q->nb_pending_requests = 0; q->csr_tail = q->tail; } @@ -641,25 +640,20 @@ qat_enqueue_op_burst(void *qp, void **ops, uint16_t nb_ops) kick_tail: queue->tail = tail; tmp_qp->stats.enqueued_count += nb_ops_sent; - queue->nb_pending_requests += nb_ops_sent; - if (tmp_qp->inflights16 < QAT_CSR_TAIL_FORCE_WRITE_THRESH || - queue->nb_pending_requests > QAT_CSR_TAIL_WRITE_THRESH) { - txq_write_tail(tmp_qp, queue); - } + txq_write_tail(tmp_qp, queue); return nb_ops_sent; } uint16_t qat_dequeue_op_burst(void *qp, void **ops, uint16_t nb_ops) { - struct qat_queue *rx_queue, *tx_queue; + struct qat_queue *rx_queue; struct qat_qp *tmp_qp = (struct qat_qp *)qp; uint32_t head; uint32_t resp_counter = 0; uint8_t *resp_msg; rx_queue = &(tmp_qp->rx_q); - tx_queue = &(tmp_qp->tx_q); head = rx_queue->head; resp_msg = (uint8_t *)rx_queue->base_addr + rx_queue->head; @@ -696,11 +690,7 @@ qat_dequeue_op_burst(void *qp, void **ops, uint16_t nb_ops) QAT_CSR_HEAD_WRITE_THRESH) rxq_free_desc(tmp_qp, rx_queue); } - /* also check if tail needs to be advanced */ - if (tmp_qp->inflights16 <= QAT_CSR_TAIL_FORCE_WRITE_THRESH && - tx_queue->tail != tx_queue->csr_tail) { - txq_write_tail(tmp_qp, tx_queue); - } + return resp_counter; } diff --git a/drivers/common/qat/qat_qp.h b/drivers/common/qat/qat_qp.h index d0bf915..a9a0184 100644 --- a/drivers/common/qat/qat_qp.h +++ b/drivers/common/qat/qat_qp.h @@ -11,10 +11,6 @@ struct qat_pci_device; #define QAT_CSR_HEAD_WRITE_THRESH 32U /* number of requests to accumulate before writing head CSR */ -#define QAT_CSR_TAIL_WRITE_THRESH 32U -/* number of requests to accumulate before writing tail CSR */ -#define QAT_CSR_TAIL_FORCE_WRITE_THRESH 256U -/* number of inflights below which no tail write coalescing should occur */ typedef int (*build_request_t)(void *op, uint8_t *req, void *op_cookie, @@ -64,8 +60,6 @@ struct qat_queue { uint32_t csr_tail; /* last written tail value */ uint16_t nb_processed_responses; /* number of responses processed since last CSR head write */ - uint16_t nb_pending_requests; - /* number of requests pending since last CSR tail write */ }; struct qat_qp { -- 2.1.0