From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 83B50A04B0 for ; Fri, 7 Aug 2020 15:00:04 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6EE081C031; Fri, 7 Aug 2020 15:00:04 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id AD8501C031 for ; Fri, 7 Aug 2020 15:00:02 +0200 (CEST) IronPort-SDR: FLhH/zwomJ0LuozveD11vJZjZkR2lxy3ggF9KUaiwooTfiuU00TZe4BugCweqaPek30/wP1n6/ uIPf5kP5zN8A== X-IronPort-AV: E=McAfee;i="6000,8403,9705"; a="153036130" X-IronPort-AV: E=Sophos;i="5.75,445,1589266800"; d="scan'208";a="153036130" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Aug 2020 06:00:01 -0700 IronPort-SDR: +NaX3JfswuZ/OPzdG7o+EWVHAL7eSU3gWFJJJnf7FDUBsZqj1zao/8TjjzdpZPzhmGLDbwALLM REob18TwIkxg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,445,1589266800"; d="scan'208";a="307368569" Received: from akusztax-mobl1.ger.corp.intel.com ([10.104.121.21]) by orsmga002.jf.intel.com with ESMTP; 07 Aug 2020 05:59:56 -0700 From: Arek Kusztal To: fiona.trahe@intel.com Cc: Arek Kusztal , stable@dpdk.org Date: Fri, 7 Aug 2020 14:57:01 +0200 Message-Id: <20200807125701.1764-4-arkadiuszx.kusztal@intel.com> X-Mailer: git-send-email 2.28.0.windows.1 In-Reply-To: <20200807125701.1764-1-arkadiuszx.kusztal@intel.com> References: <20200807125701.1764-1-arkadiuszx.kusztal@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-stable] [19.11 4/4] crypto/qat: add minimum enq threshold X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" [ upstream commit 47c3f7a41a26c9943f9804691d03828b2ce09f40 ] This patch adds minimum enqueue threshold to Intel QuickAssist Technology PMD. It is an optimisation, configured by a command line option, which can be used to reduce MMIO write occurrences. Cc: stable@dpdk.org Signed-off-by: Fiona Trahe Signed-off-by: Arek Kusztal --- doc/guides/cryptodevs/qat.rst | 18 +++++++ drivers/common/qat/qat_common.c | 3 ++ drivers/common/qat/qat_common.h | 3 ++ drivers/common/qat/qat_device.c | 99 ++++++++++++++++++++++++++++++++----- drivers/common/qat/qat_device.h | 22 +++++++-- drivers/common/qat/qat_qp.c | 10 ++++ drivers/common/qat/qat_qp.h | 3 ++ drivers/compress/qat/qat_comp_pmd.c | 14 +++++- drivers/compress/qat/qat_comp_pmd.h | 4 +- drivers/crypto/qat/qat_asym_pmd.c | 14 +++++- drivers/crypto/qat/qat_asym_pmd.h | 4 +- drivers/crypto/qat/qat_sym_pmd.c | 14 +++++- drivers/crypto/qat/qat_sym_pmd.h | 4 +- 13 files changed, 190 insertions(+), 22 deletions(-) diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst index 5135703..aa3cdcf 100644 --- a/doc/guides/cryptodevs/qat.rst +++ b/doc/guides/cryptodevs/qat.rst @@ -273,6 +273,24 @@ allocated while for GEN1 devices, 12 buffers are allocated, plus 1472 bytes over larger than the input size). +Running QAT PMD with minimum threshold for burst size +~~~~~~~~~~~~~~~~~~~~~~~~ + +If only a small number or packets can be enqueued. Each enqueue causes an expensive MMIO write. +These MMIO write occurrences can be optimised by setting any of the following parameters +- qat_sym_enq_threshold +- qat_asym_enq_threshold +- qat_comp_enq_threshold +When any of these parameters is set rte_cryptodev_enqueue_burst function will +return 0 (thereby avoiding an MMIO) if the device is congested and number of packets +possible to enqueue is smaller. +To use this feature the user must set the parameter on process start as a device additional parameter: + .example: '-w 03:01.1,qat_sym_enq_threshold=32,qat_comp_enq_threshold=16' +All parameters can be used with the same device regardless of order. Parameters are separated +by comma. When the same parameter is used more than once first occurrence of the parameter +is used. +Maximum threshold that can be set is 32. + Device and driver naming ~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/drivers/common/qat/qat_common.c b/drivers/common/qat/qat_common.c index 4753866..5343a14 100644 --- a/drivers/common/qat/qat_common.c +++ b/drivers/common/qat/qat_common.c @@ -94,6 +94,9 @@ void qat_stats_get(struct qat_pci_device *dev, stats->dequeued_count += qp[i]->stats.dequeued_count; stats->enqueue_err_count += qp[i]->stats.enqueue_err_count; stats->dequeue_err_count += qp[i]->stats.dequeue_err_count; + stats->threshold_hit_count += qp[i]->stats.threshold_hit_count; + QAT_LOG(DEBUG, "Threshold was used for qp %d %"PRIu64" times", + i, stats->threshold_hit_count); } } diff --git a/drivers/common/qat/qat_common.h b/drivers/common/qat/qat_common.h index de9a3ba..cf840fe 100644 --- a/drivers/common/qat/qat_common.h +++ b/drivers/common/qat/qat_common.h @@ -61,6 +61,9 @@ struct qat_common_stats { /**< Total error count on operations enqueued */ uint64_t dequeue_err_count; /**< Total error count on operations dequeued */ + uint64_t threshold_hit_count; + /**< Total number of times min qp threshold condition was fulfilled */ + }; struct qat_pci_device; diff --git a/drivers/common/qat/qat_device.c b/drivers/common/qat/qat_device.c index 18dbdd5..03f5fd1 100644 --- a/drivers/common/qat/qat_device.c +++ b/drivers/common/qat/qat_device.c @@ -3,6 +3,8 @@ */ #include +#include +#include #include "qat_device.h" #include "adf_transport_access_macros.h" @@ -100,12 +102,72 @@ qat_get_qat_dev_from_pci_dev(struct rte_pci_device *pci_dev) return qat_pci_get_named_dev(name); } +static void qat_dev_parse_cmd(const char *str, struct qat_dev_cmd_param + *qat_dev_cmd_param) +{ + int i = 0; + const char *param; + + while (1) { + char value_str[4] = { }; + + param = qat_dev_cmd_param[i].name; + if (param == NULL) + return; + long value = 0; + const char *arg = strstr(str, param); + const char *arg2 = NULL; + + if (arg) { + arg2 = arg + strlen(param); + if (*arg2 != '=') { + QAT_LOG(DEBUG, "parsing error '=' sign" + " should immediately follow %s", + param); + arg2 = NULL; + } else + arg2++; + } else { + QAT_LOG(DEBUG, "%s not provided", param); + } + if (arg2) { + int iter = 0; + + while (iter < 2) { + if (!isdigit(*(arg2 + iter))) + break; + iter++; + } + if (!iter) { + QAT_LOG(DEBUG, "parsing error %s" + " no number provided", + param); + } else { + memcpy(value_str, arg2, iter); + value = strtol(value_str, NULL, 10); + if (value > MAX_QP_THRESHOLD_SIZE) { + QAT_LOG(DEBUG, "Exceeded max size of" + " threshold, setting to %d", + MAX_QP_THRESHOLD_SIZE); + value = MAX_QP_THRESHOLD_SIZE; + } + QAT_LOG(DEBUG, "parsing %s = %ld", + param, value); + } + } + qat_dev_cmd_param[i].val = value; + i++; + } +} + struct qat_pci_device * -qat_pci_device_allocate(struct rte_pci_device *pci_dev) +qat_pci_device_allocate(struct rte_pci_device *pci_dev, + struct qat_dev_cmd_param *qat_dev_cmd_param) { struct qat_pci_device *qat_dev; uint8_t qat_dev_id = 0; char name[QAT_DEV_NAME_MAX_LEN]; + struct rte_devargs *devargs = pci_dev->device.devargs; rte_pci_device_name(&pci_dev->addr, name, sizeof(name)); snprintf(name+strlen(name), QAT_DEV_NAME_MAX_LEN-strlen(name), "_qat"); @@ -174,6 +236,9 @@ qat_pci_device_allocate(struct rte_pci_device *pci_dev) return NULL; } + if (devargs && devargs->drv_str) + qat_dev_parse_cmd(devargs->drv_str, qat_dev_cmd_param); + rte_spinlock_init(&qat_dev->arb_csr_lock); qat_nb_pci_devices++; @@ -244,37 +309,44 @@ qat_pci_dev_destroy(struct qat_pci_device *qat_pci_dev, static int qat_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, struct rte_pci_device *pci_dev) { - int ret = 0; + int sym_ret = 0, asym_ret = 0, comp_ret = 0; int num_pmds_created = 0; struct qat_pci_device *qat_pci_dev; + struct qat_dev_cmd_param qat_dev_cmd_param[] = { + { SYM_ENQ_THRESHOLD_NAME, 0 }, + { ASYM_ENQ_THRESHOLD_NAME, 0 }, + { COMP_ENQ_THRESHOLD_NAME, 0 }, + { NULL, 0 }, + }; QAT_LOG(DEBUG, "Found QAT device at %02x:%02x.%x", pci_dev->addr.bus, pci_dev->addr.devid, pci_dev->addr.function); - qat_pci_dev = qat_pci_device_allocate(pci_dev); + qat_pci_dev = qat_pci_device_allocate(pci_dev, qat_dev_cmd_param); if (qat_pci_dev == NULL) return -ENODEV; - ret = qat_sym_dev_create(qat_pci_dev); - if (ret == 0) + sym_ret = qat_sym_dev_create(qat_pci_dev, qat_dev_cmd_param); + if (sym_ret == 0) { num_pmds_created++; + } else QAT_LOG(WARNING, "Failed to create QAT SYM PMD on device %s", qat_pci_dev->name); - ret = qat_comp_dev_create(qat_pci_dev); - if (ret == 0) + comp_ret = qat_comp_dev_create(qat_pci_dev, qat_dev_cmd_param); + if (comp_ret == 0) num_pmds_created++; else QAT_LOG(WARNING, "Failed to create QAT COMP PMD on device %s", qat_pci_dev->name); - ret = qat_asym_dev_create(qat_pci_dev); - if (ret == 0) + asym_ret = qat_asym_dev_create(qat_pci_dev, qat_dev_cmd_param); + if (asym_ret == 0) num_pmds_created++; else QAT_LOG(WARNING, @@ -309,13 +381,15 @@ static struct rte_pci_driver rte_qat_pmd = { }; __rte_weak int -qat_sym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused) +qat_sym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused, + struct qat_dev_cmd_param *qat_dev_cmd_param __rte_unused) { return 0; } __rte_weak int -qat_asym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused) +qat_asym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused, + struct qat_dev_cmd_param *qat_dev_cmd_param __rte_unused) { return 0; } @@ -333,7 +407,8 @@ qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused) } __rte_weak int -qat_comp_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused) +qat_comp_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused, + struct qat_dev_cmd_param *qat_dev_cmd_param __rte_unused) { return 0; } diff --git a/drivers/common/qat/qat_device.h b/drivers/common/qat/qat_device.h index a23975f..c3f5ae8 100644 --- a/drivers/common/qat/qat_device.h +++ b/drivers/common/qat/qat_device.h @@ -16,6 +16,16 @@ #define QAT_DEV_NAME_MAX_LEN 64 +#define SYM_ENQ_THRESHOLD_NAME "qat_sym_enq_threshold" +#define ASYM_ENQ_THRESHOLD_NAME "qat_asym_enq_threshold" +#define COMP_ENQ_THRESHOLD_NAME "qat_comp_enq_threshold" +#define MAX_QP_THRESHOLD_SIZE 32 + +struct qat_dev_cmd_param { + const char *name; + uint16_t val; +}; + enum qat_comp_num_im_buffers { QAT_NUM_INTERM_BUFS_GEN1 = 12, QAT_NUM_INTERM_BUFS_GEN2 = 20, @@ -106,7 +116,8 @@ struct qat_gen_hw_data { extern struct qat_gen_hw_data qat_gen_config[]; struct qat_pci_device * -qat_pci_device_allocate(struct rte_pci_device *pci_dev); +qat_pci_device_allocate(struct rte_pci_device *pci_dev, + struct qat_dev_cmd_param *qat_dev_cmd_param); int qat_pci_device_release(struct rte_pci_device *pci_dev); @@ -116,10 +127,12 @@ qat_get_qat_dev_from_pci_dev(struct rte_pci_device *pci_dev); /* declaration needed for weak functions */ int -qat_sym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused); +qat_sym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused, + struct qat_dev_cmd_param *qat_dev_cmd_param); int -qat_asym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused); +qat_asym_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused, + struct qat_dev_cmd_param *qat_dev_cmd_param); int qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused); @@ -128,7 +141,8 @@ int qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused); int -qat_comp_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused); +qat_comp_dev_create(struct qat_pci_device *qat_pci_dev __rte_unused, + struct qat_dev_cmd_param *qat_dev_cmd_param); int qat_comp_dev_destroy(struct qat_pci_device *qat_pci_dev __rte_unused); diff --git a/drivers/common/qat/qat_qp.c b/drivers/common/qat/qat_qp.c index 0725708..3f30871 100644 --- a/drivers/common/qat/qat_qp.c +++ b/drivers/common/qat/qat_qp.c @@ -612,6 +612,16 @@ qat_enqueue_op_burst(void *qp, void **ops, uint16_t nb_ops) if (nb_ops_possible == 0) return 0; } + /* QAT has plenty of work queued already, so don't waste cycles + * enqueueing, wait til the application has gathered a bigger + * burst or some completed ops have been dequeued + */ + if (tmp_qp->min_enq_burst_threshold && inflights > + QAT_QP_MIN_INFL_THRESHOLD && nb_ops_possible < + tmp_qp->min_enq_burst_threshold) { + tmp_qp->stats.threshold_hit_count++; + return 0; + } } while (nb_ops_sent != nb_ops_possible) { diff --git a/drivers/common/qat/qat_qp.h b/drivers/common/qat/qat_qp.h index 973e883..47ad5dd 100644 --- a/drivers/common/qat/qat_qp.h +++ b/drivers/common/qat/qat_qp.h @@ -12,6 +12,8 @@ struct qat_pci_device; #define QAT_CSR_HEAD_WRITE_THRESH 32U /* number of requests to accumulate before writing head CSR */ +#define QAT_QP_MIN_INFL_THRESHOLD 256 + typedef int (*build_request_t)(void *op, uint8_t *req, void *op_cookie, enum qat_device_gen qat_dev_gen); @@ -77,6 +79,7 @@ struct qat_qp { uint32_t enqueued; uint32_t dequeued __rte_aligned(4); uint16_t max_inflights; + uint16_t min_enq_burst_threshold; } __rte_cache_aligned; extern const struct qat_qp_hw_data qat_gen1_qps[][ADF_MAX_QPS_ON_ANY_SERVICE]; diff --git a/drivers/compress/qat/qat_comp_pmd.c b/drivers/compress/qat/qat_comp_pmd.c index cb25916..5cdabad 100644 --- a/drivers/compress/qat/qat_comp_pmd.c +++ b/drivers/compress/qat/qat_comp_pmd.c @@ -139,6 +139,7 @@ qat_comp_qp_setup(struct rte_compressdev *dev, uint16_t qp_id, = *qp_addr; qp = (struct qat_qp *)*qp_addr; + qp->min_enq_burst_threshold = qat_private->min_enq_burst_threshold; for (i = 0; i < qp->nb_descriptors; i++) { @@ -660,8 +661,10 @@ static const struct rte_driver compdev_qat_driver = { .alias = qat_comp_drv_name }; int -qat_comp_dev_create(struct qat_pci_device *qat_pci_dev) +qat_comp_dev_create(struct qat_pci_device *qat_pci_dev, + struct qat_dev_cmd_param *qat_dev_cmd_param) { + int i = 0; struct qat_device_info *qat_dev_instance = &qat_pci_devs[qat_pci_dev->qat_dev_id]; if (qat_pci_dev->qat_dev_gen == QAT_GEN3) { @@ -751,6 +754,15 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev) memcpy(comp_dev->capa_mz->addr, capabilities, capa_size); comp_dev->qat_dev_capabilities = comp_dev->capa_mz->addr; + while (1) { + if (qat_dev_cmd_param[i].name == NULL) + break; + if (!strcmp(qat_dev_cmd_param[i].name, COMP_ENQ_THRESHOLD_NAME)) + comp_dev->min_enq_burst_threshold = + qat_dev_cmd_param[i].val; + i++; + } + qat_pci_dev->comp_dev = comp_dev; QAT_LOG(DEBUG, "Created QAT COMP device %s as compressdev instance %d", diff --git a/drivers/compress/qat/qat_comp_pmd.h b/drivers/compress/qat/qat_comp_pmd.h index bd5a64f..ed27120 100644 --- a/drivers/compress/qat/qat_comp_pmd.h +++ b/drivers/compress/qat/qat_comp_pmd.h @@ -34,10 +34,12 @@ struct qat_comp_dev_private { /**< The device's pool for qat_comp_streams */ const struct rte_memzone *capa_mz; /* Shared memzone for storing capabilities */ + uint16_t min_enq_burst_threshold; }; int -qat_comp_dev_create(struct qat_pci_device *qat_pci_dev); +qat_comp_dev_create(struct qat_pci_device *qat_pci_dev, + struct qat_dev_cmd_param *qat_dev_cmd_param); int qat_comp_dev_destroy(struct qat_pci_device *qat_pci_dev); diff --git a/drivers/crypto/qat/qat_asym_pmd.c b/drivers/crypto/qat/qat_asym_pmd.c index 7ac41f2..2b69b8e 100644 --- a/drivers/crypto/qat/qat_asym_pmd.c +++ b/drivers/crypto/qat/qat_asym_pmd.c @@ -160,6 +160,7 @@ static int qat_asym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id, = *qp_addr; qp = (struct qat_qp *)*qp_addr; + qp->min_enq_burst_threshold = qat_private->min_enq_burst_threshold; for (i = 0; i < qp->nb_descriptors; i++) { int j; @@ -235,8 +236,10 @@ static const struct rte_driver cryptodev_qat_asym_driver = { }; int -qat_asym_dev_create(struct qat_pci_device *qat_pci_dev) +qat_asym_dev_create(struct qat_pci_device *qat_pci_dev, + struct qat_dev_cmd_param *qat_dev_cmd_param) { + int i = 0; struct qat_device_info *qat_dev_instance = &qat_pci_devs[qat_pci_dev->qat_dev_id]; @@ -325,6 +328,15 @@ qat_asym_dev_create(struct qat_pci_device *qat_pci_dev) sizeof(qat_gen1_asym_capabilities)); internals->qat_dev_capabilities = internals->capa_mz->addr; + while (1) { + if (qat_dev_cmd_param[i].name == NULL) + break; + if (!strcmp(qat_dev_cmd_param[i].name, ASYM_ENQ_THRESHOLD_NAME)) + internals->min_enq_burst_threshold = + qat_dev_cmd_param[i].val; + i++; + } + qat_pci_dev->asym_dev = internals; QAT_LOG(DEBUG, "Created QAT ASYM device %s as cryptodev instance %d", cryptodev->data->name, internals->asym_dev_id); diff --git a/drivers/crypto/qat/qat_asym_pmd.h b/drivers/crypto/qat/qat_asym_pmd.h index 3efb900..3b5abdd 100644 --- a/drivers/crypto/qat/qat_asym_pmd.h +++ b/drivers/crypto/qat/qat_asym_pmd.h @@ -28,6 +28,7 @@ struct qat_asym_dev_private { /* QAT device asymmetric crypto capabilities */ const struct rte_memzone *capa_mz; /* Shared memzone for storing capabilities */ + uint16_t min_enq_burst_threshold; }; uint16_t @@ -44,7 +45,8 @@ int qat_asym_session_configure(struct rte_cryptodev *dev, struct rte_mempool *mempool); int -qat_asym_dev_create(struct qat_pci_device *qat_pci_dev); +qat_asym_dev_create(struct qat_pci_device *qat_pci_dev, + struct qat_dev_cmd_param *qat_dev_cmd_param); int qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev); diff --git a/drivers/crypto/qat/qat_sym_pmd.c b/drivers/crypto/qat/qat_sym_pmd.c index 7a0d4c5..31ed6a9 100644 --- a/drivers/crypto/qat/qat_sym_pmd.c +++ b/drivers/crypto/qat/qat_sym_pmd.c @@ -177,6 +177,7 @@ static int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id, = *qp_addr; qp = (struct qat_qp *)*qp_addr; + qp->min_enq_burst_threshold = qat_private->min_enq_burst_threshold; for (i = 0; i < qp->nb_descriptors; i++) { @@ -270,8 +271,10 @@ static const struct rte_driver cryptodev_qat_sym_driver = { }; int -qat_sym_dev_create(struct qat_pci_device *qat_pci_dev) +qat_sym_dev_create(struct qat_pci_device *qat_pci_dev, + struct qat_dev_cmd_param *qat_dev_cmd_param __rte_unused) { + int i = 0; struct qat_device_info *qat_dev_instance = &qat_pci_devs[qat_pci_dev->qat_dev_id]; @@ -392,6 +395,15 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev) memcpy(internals->capa_mz->addr, capabilities, capa_size); internals->qat_dev_capabilities = internals->capa_mz->addr; + while (1) { + if (qat_dev_cmd_param[i].name == NULL) + break; + if (!strcmp(qat_dev_cmd_param[i].name, SYM_ENQ_THRESHOLD_NAME)) + internals->min_enq_burst_threshold = + qat_dev_cmd_param[i].val; + i++; + } + qat_pci_dev->sym_dev = internals; QAT_LOG(DEBUG, "Created QAT SYM device %s as cryptodev instance %d", cryptodev->data->name, internals->sym_dev_id); diff --git a/drivers/crypto/qat/qat_sym_pmd.h b/drivers/crypto/qat/qat_sym_pmd.h index 6137c46..e2ed112 100644 --- a/drivers/crypto/qat/qat_sym_pmd.h +++ b/drivers/crypto/qat/qat_sym_pmd.h @@ -35,10 +35,12 @@ struct qat_sym_dev_private { uint32_t internal_capabilities; /* see flags QAT_SYM_CAP_xxx */ const struct rte_memzone *capa_mz; /* Shared memzone for storing capabilities */ + uint16_t min_enq_burst_threshold; }; int -qat_sym_dev_create(struct qat_pci_device *qat_pci_dev); +qat_sym_dev_create(struct qat_pci_device *qat_pci_dev, + struct qat_dev_cmd_param *qat_dev_cmd_param); int qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev); -- 2.1.0