From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id E6499A04DD for ; Wed, 28 Oct 2020 11:49:47 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DEBF8C9F0; Wed, 28 Oct 2020 11:49:46 +0100 (CET) Received: from mail-wm1-f49.google.com (mail-wm1-f49.google.com [209.85.128.49]) by dpdk.org (Postfix) with ESMTP id 4A305CA06 for ; Wed, 28 Oct 2020 11:49:45 +0100 (CET) Received: by mail-wm1-f49.google.com with SMTP id h22so4297986wmb.0 for ; Wed, 28 Oct 2020 03:49:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6TNqqZS+7jtiTHU/eHkRrO0s4+s6RugRGFBB1/klNUA=; b=BJafeM6/G6yaKcbquDkip53pb9Ug+IAgyPRKuxMNBfF2eN1azt2Azn9ghm0UOL8Vs5 qD+zka8RYXQZ9/bAw6pmYi0DXjQ09t7IeG5q+fYbP30z02jYnd1FGRi52oIOr9BMeFOG j+lk0umROYeyDEYULVqWXlbiafWrUPSJT75dAOL3Eq3ztxKd1T43WySbEsMB1XSDmxA2 XI73CixJ4Oye6QxOXPQguXJGSdQbUgvnNLI9Z2X3Q7rXDflVEwiROVy3SX+weC50i8dm HNNEwVzupvLqQ0Urrmkl3kjWbkJwtQ4MRmeVdx8PNel0OEjr+qIWmMXavYFuyQUK82Wb qm8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6TNqqZS+7jtiTHU/eHkRrO0s4+s6RugRGFBB1/klNUA=; b=WDLRwV0UcJ/kXgclwhvdD7WMI6vyQpUcDeOR0Rx+mV9MfcYYaV1UTjkOEBOxr0xNXj PuzUZjnrqur8iDdtoGaRslDdJbjQNkjlMDspr7/rdgm6J7BcJzWm1ufDgMLkwIovpQ7s Mws7TT6piLbdXBQRPaXmIgYexC+USrTAz5UYGZ53YK6/J8yo+WIsYdWAmtP34Xrioy4w kdiVU9T3A7gUVMU0NtdRlk6/YtbkJS47+OZfu5bWaIcHXhyBQIlnK3Z3jR2NUYYKUwaE Ce+jXkV+eghBkeeBfREJuISU+u+YxbcQGHf7RdRi+dSVL8l4EwAcfrvnA8jV6mCH7Luu o7Kw== X-Gm-Message-State: AOAM531svJlhbvRGUslG/lCG3cKaGPggA5J0QRDkWKl7BNR8+K4c9aNg g/YZZlPFzGPfwa7ZLJJ4pyI= X-Google-Smtp-Source: ABdhPJy8bZGSwm+mC2cAC+hJuLofzOycLzqRB02CGSIQ/V8c7mRlqujXAexbWKjYzCiTTALot02SnQ== X-Received: by 2002:a7b:c5c3:: with SMTP id n3mr7203154wmk.44.1603882184985; Wed, 28 Oct 2020 03:49:44 -0700 (PDT) Received: from localhost ([88.98.246.218]) by smtp.gmail.com with ESMTPSA id y185sm5632927wmb.29.2020.10.28.03.49.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Oct 2020 03:49:44 -0700 (PDT) From: luca.boccassi@gmail.com To: Junyu Jiang Cc: Ferruh Yigit , dpdk stable Date: Wed, 28 Oct 2020 10:43:48 +0000 Message-Id: <20201028104606.3504127-69-luca.boccassi@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201028104606.3504127-1-luca.boccassi@gmail.com> References: <20201028104606.3504127-1-luca.boccassi@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-stable] patch 'net/i40e: fix byte counters' has been queued to stable release 19.11.6 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi, FYI, your patch has been queued to stable release 19.11.6 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 10/30/20. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Thanks. Luca Boccassi --- >From caa8c6ed731fcbfb1527d6686a9d4e85ecb70001 Mon Sep 17 00:00:00 2001 From: Junyu Jiang Date: Tue, 22 Sep 2020 09:19:31 +0000 Subject: [PATCH] net/i40e: fix byte counters [ upstream commit b96646187285b1b593b76af5dbcc365a99900377 ] This patch fixed the issue that rx/tx bytes statistics counters overflowed on 48 bit limitation by enlarging the limitation. Fixes: 4861cde46116 ("i40e: new poll mode driver") Signed-off-by: Junyu Jiang Reviewed-by: Ferruh Yigit --- doc/guides/nics/i40e.rst | 9 +++++ drivers/net/i40e/i40e_ethdev.c | 66 +++++++++++++++++++++------------- drivers/net/i40e/i40e_ethdev.h | 9 +++++ 3 files changed, 59 insertions(+), 25 deletions(-) diff --git a/doc/guides/nics/i40e.rst b/doc/guides/nics/i40e.rst index 61d72c2b10..cfeb156935 100644 --- a/doc/guides/nics/i40e.rst +++ b/doc/guides/nics/i40e.rst @@ -582,6 +582,15 @@ When a packet is over maximum frame size, the packet is dropped. However, the Rx statistics, when calling `rte_eth_stats_get` incorrectly shows it as received. +RX/TX statistics may be incorrect when register overflowed +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +The rx_bytes/tx_bytes statistics register is 48 bit length. +Although this limitation is enlarged to 64 bit length on the software side, +but there is no way to detect if the overflow occurred more than once. +So rx_bytes/tx_bytes statistics data is correct when statistics are +updated at least once between two overflows. + VF & TC max bandwidth setting ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 144758ef80..a8a534c6f8 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -2934,6 +2934,21 @@ i40e_dev_link_update(struct rte_eth_dev *dev, return ret; } +static void +i40e_stat_update_48_in_64(struct i40e_hw *hw, uint32_t hireg, + uint32_t loreg, bool offset_loaded, uint64_t *offset, + uint64_t *stat, uint64_t *prev_stat) +{ + i40e_stat_update_48(hw, hireg, loreg, offset_loaded, offset, stat); + /* enlarge the limitation when statistics counters overflowed */ + if (offset_loaded) { + if (I40E_RXTX_BYTES_L_48_BIT(*prev_stat) > *stat) + *stat += (uint64_t)1 << I40E_48_BIT_WIDTH; + *stat += I40E_RXTX_BYTES_H_16_BIT(*prev_stat); + } + *prev_stat = *stat; +} + /* Get all the statistics of a VSI */ void i40e_update_vsi_stats(struct i40e_vsi *vsi) @@ -2943,9 +2958,9 @@ i40e_update_vsi_stats(struct i40e_vsi *vsi) struct i40e_hw *hw = I40E_VSI_TO_HW(vsi); int idx = rte_le_to_cpu_16(vsi->info.stat_counter_idx); - i40e_stat_update_48(hw, I40E_GLV_GORCH(idx), I40E_GLV_GORCL(idx), - vsi->offset_loaded, &oes->rx_bytes, - &nes->rx_bytes); + i40e_stat_update_48_in_64(hw, I40E_GLV_GORCH(idx), I40E_GLV_GORCL(idx), + vsi->offset_loaded, &oes->rx_bytes, + &nes->rx_bytes, &vsi->prev_rx_bytes); i40e_stat_update_48(hw, I40E_GLV_UPRCH(idx), I40E_GLV_UPRCL(idx), vsi->offset_loaded, &oes->rx_unicast, &nes->rx_unicast); @@ -2966,9 +2981,9 @@ i40e_update_vsi_stats(struct i40e_vsi *vsi) i40e_stat_update_32(hw, I40E_GLV_RUPP(idx), vsi->offset_loaded, &oes->rx_unknown_protocol, &nes->rx_unknown_protocol); - i40e_stat_update_48(hw, I40E_GLV_GOTCH(idx), I40E_GLV_GOTCL(idx), - vsi->offset_loaded, &oes->tx_bytes, - &nes->tx_bytes); + i40e_stat_update_48_in_64(hw, I40E_GLV_GOTCH(idx), I40E_GLV_GOTCL(idx), + vsi->offset_loaded, &oes->tx_bytes, + &nes->tx_bytes, &vsi->prev_tx_bytes); i40e_stat_update_48(hw, I40E_GLV_UPTCH(idx), I40E_GLV_UPTCL(idx), vsi->offset_loaded, &oes->tx_unicast, &nes->tx_unicast); @@ -3010,17 +3025,18 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct i40e_hw *hw) struct i40e_hw_port_stats *os = &pf->stats_offset; /* old stats */ /* Get rx/tx bytes of internal transfer packets */ - i40e_stat_update_48(hw, I40E_GLV_GORCH(hw->port), - I40E_GLV_GORCL(hw->port), - pf->offset_loaded, - &pf->internal_stats_offset.rx_bytes, - &pf->internal_stats.rx_bytes); - - i40e_stat_update_48(hw, I40E_GLV_GOTCH(hw->port), - I40E_GLV_GOTCL(hw->port), - pf->offset_loaded, - &pf->internal_stats_offset.tx_bytes, - &pf->internal_stats.tx_bytes); + i40e_stat_update_48_in_64(hw, I40E_GLV_GORCH(hw->port), + I40E_GLV_GORCL(hw->port), + pf->offset_loaded, + &pf->internal_stats_offset.rx_bytes, + &pf->internal_stats.rx_bytes, + &pf->internal_prev_rx_bytes); + i40e_stat_update_48_in_64(hw, I40E_GLV_GOTCH(hw->port), + I40E_GLV_GOTCL(hw->port), + pf->offset_loaded, + &pf->internal_stats_offset.tx_bytes, + &pf->internal_stats.tx_bytes, + &pf->internal_prev_tx_bytes); /* Get total internal rx packet count */ i40e_stat_update_48(hw, I40E_GLV_UPRCH(hw->port), I40E_GLV_UPRCL(hw->port), @@ -3060,10 +3076,10 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct i40e_hw *hw) pf->internal_stats.rx_broadcast) * RTE_ETHER_CRC_LEN; /* Get statistics of struct i40e_eth_stats */ - i40e_stat_update_48(hw, I40E_GLPRT_GORCH(hw->port), - I40E_GLPRT_GORCL(hw->port), - pf->offset_loaded, &os->eth.rx_bytes, - &ns->eth.rx_bytes); + i40e_stat_update_48_in_64(hw, I40E_GLPRT_GORCH(hw->port), + I40E_GLPRT_GORCL(hw->port), + pf->offset_loaded, &os->eth.rx_bytes, + &ns->eth.rx_bytes, &pf->prev_rx_bytes); i40e_stat_update_48(hw, I40E_GLPRT_UPRCH(hw->port), I40E_GLPRT_UPRCL(hw->port), pf->offset_loaded, &os->eth.rx_unicast, @@ -3118,10 +3134,10 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct i40e_hw *hw) pf->offset_loaded, &os->eth.rx_unknown_protocol, &ns->eth.rx_unknown_protocol); - i40e_stat_update_48(hw, I40E_GLPRT_GOTCH(hw->port), - I40E_GLPRT_GOTCL(hw->port), - pf->offset_loaded, &os->eth.tx_bytes, - &ns->eth.tx_bytes); + i40e_stat_update_48_in_64(hw, I40E_GLPRT_GOTCH(hw->port), + I40E_GLPRT_GOTCL(hw->port), + pf->offset_loaded, &os->eth.tx_bytes, + &ns->eth.tx_bytes, &pf->prev_tx_bytes); i40e_stat_update_48(hw, I40E_GLPRT_UPTCH(hw->port), I40E_GLPRT_UPTCL(hw->port), pf->offset_loaded, &os->eth.tx_unicast, diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h index e9621d67ad..1cd75b4366 100644 --- a/drivers/net/i40e/i40e_ethdev.h +++ b/drivers/net/i40e/i40e_ethdev.h @@ -270,6 +270,9 @@ enum i40e_flxpld_layer_idx { #define I40E_ETH_OVERHEAD \ (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + I40E_VLAN_TAG_SIZE * 2) +#define I40E_RXTX_BYTES_H_16_BIT(bytes) ((bytes) & ~I40E_48_BIT_MASK) +#define I40E_RXTX_BYTES_L_48_BIT(bytes) ((bytes) & I40E_48_BIT_MASK) + struct i40e_adapter; struct rte_pci_driver; @@ -387,6 +390,8 @@ struct i40e_vsi { uint8_t vlan_anti_spoof_on; /* The VLAN anti-spoofing enabled */ uint8_t vlan_filter_on; /* The VLAN filter enabled */ struct i40e_bw_info bw_info; /* VSI bandwidth information */ + uint64_t prev_rx_bytes; + uint64_t prev_tx_bytes; }; struct pool_entry { @@ -1007,6 +1012,10 @@ struct i40e_pf { uint16_t switch_domain_id; struct i40e_vf_msg_cfg vf_msg_cfg; + uint64_t prev_rx_bytes; + uint64_t prev_tx_bytes; + uint64_t internal_prev_rx_bytes; + uint64_t internal_prev_tx_bytes; }; enum pending_msg { -- 2.20.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2020-10-28 10:35:13.906126878 +0000 +++ 0069-net-i40e-fix-byte-counters.patch 2020-10-28 10:35:11.552830730 +0000 @@ -1,13 +1,14 @@ -From b96646187285b1b593b76af5dbcc365a99900377 Mon Sep 17 00:00:00 2001 +From caa8c6ed731fcbfb1527d6686a9d4e85ecb70001 Mon Sep 17 00:00:00 2001 From: Junyu Jiang Date: Tue, 22 Sep 2020 09:19:31 +0000 Subject: [PATCH] net/i40e: fix byte counters +[ upstream commit b96646187285b1b593b76af5dbcc365a99900377 ] + This patch fixed the issue that rx/tx bytes statistics counters overflowed on 48 bit limitation by enlarging the limitation. Fixes: 4861cde46116 ("i40e: new poll mode driver") -Cc: stable@dpdk.org Signed-off-by: Junyu Jiang Reviewed-by: Ferruh Yigit @@ -18,10 +19,10 @@ 3 files changed, 59 insertions(+), 25 deletions(-) diff --git a/doc/guides/nics/i40e.rst b/doc/guides/nics/i40e.rst -index b7430f6c4e..a0b81e6695 100644 +index 61d72c2b10..cfeb156935 100644 --- a/doc/guides/nics/i40e.rst +++ b/doc/guides/nics/i40e.rst -@@ -670,6 +670,15 @@ When a packet is over maximum frame size, the packet is dropped. +@@ -582,6 +582,15 @@ When a packet is over maximum frame size, the packet is dropped. However, the Rx statistics, when calling `rte_eth_stats_get` incorrectly shows it as received. @@ -38,10 +39,10 @@ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c -index 563f21d9df..6439baf2f8 100644 +index 144758ef80..a8a534c6f8 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c -@@ -3052,6 +3052,21 @@ i40e_dev_link_update(struct rte_eth_dev *dev, +@@ -2934,6 +2934,21 @@ i40e_dev_link_update(struct rte_eth_dev *dev, return ret; } @@ -63,7 +64,7 @@ /* Get all the statistics of a VSI */ void i40e_update_vsi_stats(struct i40e_vsi *vsi) -@@ -3061,9 +3076,9 @@ i40e_update_vsi_stats(struct i40e_vsi *vsi) +@@ -2943,9 +2958,9 @@ i40e_update_vsi_stats(struct i40e_vsi *vsi) struct i40e_hw *hw = I40E_VSI_TO_HW(vsi); int idx = rte_le_to_cpu_16(vsi->info.stat_counter_idx); @@ -76,7 +77,7 @@ i40e_stat_update_48(hw, I40E_GLV_UPRCH(idx), I40E_GLV_UPRCL(idx), vsi->offset_loaded, &oes->rx_unicast, &nes->rx_unicast); -@@ -3084,9 +3099,9 @@ i40e_update_vsi_stats(struct i40e_vsi *vsi) +@@ -2966,9 +2981,9 @@ i40e_update_vsi_stats(struct i40e_vsi *vsi) i40e_stat_update_32(hw, I40E_GLV_RUPP(idx), vsi->offset_loaded, &oes->rx_unknown_protocol, &nes->rx_unknown_protocol); @@ -89,7 +90,7 @@ i40e_stat_update_48(hw, I40E_GLV_UPTCH(idx), I40E_GLV_UPTCL(idx), vsi->offset_loaded, &oes->tx_unicast, &nes->tx_unicast); -@@ -3128,17 +3143,18 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct i40e_hw *hw) +@@ -3010,17 +3025,18 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct i40e_hw *hw) struct i40e_hw_port_stats *os = &pf->stats_offset; /* old stats */ /* Get rx/tx bytes of internal transfer packets */ @@ -119,7 +120,7 @@ /* Get total internal rx packet count */ i40e_stat_update_48(hw, I40E_GLV_UPRCH(hw->port), I40E_GLV_UPRCL(hw->port), -@@ -3178,10 +3194,10 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct i40e_hw *hw) +@@ -3060,10 +3076,10 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct i40e_hw *hw) pf->internal_stats.rx_broadcast) * RTE_ETHER_CRC_LEN; /* Get statistics of struct i40e_eth_stats */ @@ -134,7 +135,7 @@ i40e_stat_update_48(hw, I40E_GLPRT_UPRCH(hw->port), I40E_GLPRT_UPRCL(hw->port), pf->offset_loaded, &os->eth.rx_unicast, -@@ -3236,10 +3252,10 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct i40e_hw *hw) +@@ -3118,10 +3134,10 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct i40e_hw *hw) pf->offset_loaded, &os->eth.rx_unknown_protocol, &ns->eth.rx_unknown_protocol); @@ -150,10 +151,10 @@ I40E_GLPRT_UPTCL(hw->port), pf->offset_loaded, &os->eth.tx_unicast, diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h -index 19f821829a..1466998aa1 100644 +index e9621d67ad..1cd75b4366 100644 --- a/drivers/net/i40e/i40e_ethdev.h +++ b/drivers/net/i40e/i40e_ethdev.h -@@ -282,6 +282,9 @@ struct rte_flow { +@@ -270,6 +270,9 @@ enum i40e_flxpld_layer_idx { #define I40E_ETH_OVERHEAD \ (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + I40E_VLAN_TAG_SIZE * 2) @@ -163,7 +164,7 @@ struct i40e_adapter; struct rte_pci_driver; -@@ -399,6 +402,8 @@ struct i40e_vsi { +@@ -387,6 +390,8 @@ struct i40e_vsi { uint8_t vlan_anti_spoof_on; /* The VLAN anti-spoofing enabled */ uint8_t vlan_filter_on; /* The VLAN filter enabled */ struct i40e_bw_info bw_info; /* VSI bandwidth information */ @@ -172,7 +173,7 @@ }; struct pool_entry { -@@ -1156,6 +1161,10 @@ struct i40e_pf { +@@ -1007,6 +1012,10 @@ struct i40e_pf { uint16_t switch_domain_id; struct i40e_vf_msg_cfg vf_msg_cfg;