From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 769C3A09EE for ; Tue, 15 Dec 2020 11:10:56 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8B3DECA12; Tue, 15 Dec 2020 11:10:54 +0100 (CET) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 91B3BC9C6; Tue, 15 Dec 2020 11:10:50 +0100 (CET) IronPort-SDR: o6S6zlNU911mQ4xFndDtUdFsfany6wm7V/zXrmFQEjH6Jj739pMyMbjTfS8ONpiQVUun+3T+FG itrcbcUvcqDQ== X-IronPort-AV: E=McAfee;i="6000,8403,9835"; a="238955869" X-IronPort-AV: E=Sophos;i="5.78,420,1599548400"; d="scan'208";a="238955869" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Dec 2020 02:10:45 -0800 IronPort-SDR: g7DZRPwILAHaMDGoxBvHeY/XGHCm0fviEE88YW/7BPkpPsQKKBWclbST3dJZSHVwGko6ptATnn UQldc/k9ZbiQ== X-IronPort-AV: E=Sophos;i="5.78,420,1599548400"; d="scan'208";a="368144800" Received: from unknown (HELO ubuntu-server.sh.intel.com) ([10.240.183.93]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Dec 2020 02:10:42 -0800 From: dapengx.yu@intel.com To: jia.guo@intel.com Cc: dev@dpdk.org, YU DAPENG , stable@dpdk.org Date: Tue, 15 Dec 2020 18:10:31 +0800 Message-Id: <20201215101031.99657-1-dapengx.yu@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201211013506.49885-1-dapengx.yu@intel.com> References: <20201211013506.49885-1-dapengx.yu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-stable] [PATCH v2] net/ixgbe: fix fdirctrl register setting X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" From: YU DAPENG The function ixgbe_fdir_set_flexbytes_offset is used when create FDir rule for flexbytes. It set a register: FDIRCTRL.FLEX_OFFSET, which cause that even if the FDir flexbytes rule is destroyed, the rule still direct the packet and transfer it to the wrong place. It is because setting FDIRCTRL shall only be permitted on Flow Director initialization flow or clearing the Flow Director table according to intel datasheet, otherwise unexpected happens. In order to evade the limit, add code to set FDIRCMD.CLEARHT to 1b and then clear it back to 0b to make the setting act like the Flow Director initialization flow or clearing the Flow Director table. Fixes: f35fec63dde1 ("net/ixgbe: enable flex bytes for generic flow API") Cc: stable@dpdk.org Signed-off-by: YU DAPENG --- drivers/net/ixgbe/ixgbe_fdir.c | 29 +++++++++++++++++++++++++++++ drivers/net/ixgbe/ixgbe_flow.c | 15 ++++++++------- 2 files changed, 37 insertions(+), 7 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_fdir.c b/drivers/net/ixgbe/ixgbe_fdir.c index a0fab5070..11b9effeb 100644 --- a/drivers/net/ixgbe/ixgbe_fdir.c +++ b/drivers/net/ixgbe/ixgbe_fdir.c @@ -503,9 +503,30 @@ ixgbe_fdir_set_flexbytes_offset(struct rte_eth_dev *dev, uint16_t offset) { struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + struct ixgbe_hw_fdir_info *fdir_info = + IXGBE_DEV_PRIVATE_TO_FDIR_INFO(dev->data->dev_private); uint32_t fdirctrl; int i; + if (fdir_info->flex_bytes_offset == offset) + return 0; + + /** + * 82599 adapters flow director init flow cannot be restarted, + * Workaround 82599 silicon errata by performing the following steps + * before re-writing the FDIRCTRL control register with the same value. + * - write 1 to bit 8 of FDIRCMD register & + * - write 0 to bit 8 of FDIRCMD register + */ + IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, + (IXGBE_READ_REG(hw, IXGBE_FDIRCMD) | + IXGBE_FDIRCMD_CLEARHT)); + IXGBE_WRITE_FLUSH(hw); + IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, + (IXGBE_READ_REG(hw, IXGBE_FDIRCMD) & + ~IXGBE_FDIRCMD_CLEARHT)); + IXGBE_WRITE_FLUSH(hw); + fdirctrl = IXGBE_READ_REG(hw, IXGBE_FDIRCTRL); fdirctrl &= ~IXGBE_FDIRCTRL_FLEX_MASK; @@ -520,6 +541,14 @@ ixgbe_fdir_set_flexbytes_offset(struct rte_eth_dev *dev, break; msec_delay(1); } + + if (i >= IXGBE_FDIR_INIT_DONE_POLL) { + PMD_DRV_LOG(ERR, "Flow Director poll time exceeded!"); + return -ETIMEDOUT; + } + + fdir_info->flex_bytes_offset = offset; + return 0; } diff --git a/drivers/net/ixgbe/ixgbe_flow.c b/drivers/net/ixgbe/ixgbe_flow.c index 39f6ed73f..9aeb2e4a4 100644 --- a/drivers/net/ixgbe/ixgbe_flow.c +++ b/drivers/net/ixgbe/ixgbe_flow.c @@ -3137,13 +3137,13 @@ ixgbe_flow_create(struct rte_eth_dev *dev, rte_memcpy(&fdir_info->mask, &fdir_rule.mask, sizeof(struct ixgbe_hw_fdir_mask)); - fdir_info->flex_bytes_offset = - fdir_rule.flex_bytes_offset; - if (fdir_rule.mask.flex_bytes_mask) - ixgbe_fdir_set_flexbytes_offset(dev, + if (fdir_rule.mask.flex_bytes_mask) { + ret = ixgbe_fdir_set_flexbytes_offset(dev, fdir_rule.flex_bytes_offset); - + if (ret) + goto out; + } ret = ixgbe_fdir_set_input_mask(dev); if (ret) goto out; @@ -3161,8 +3161,9 @@ ixgbe_flow_create(struct rte_eth_dev *dev, if (ret) goto out; - if (fdir_info->flex_bytes_offset != - fdir_rule.flex_bytes_offset) + if (fdir_rule.mask.flex_bytes_mask && + fdir_info->flex_bytes_offset != + fdir_rule.flex_bytes_offset) goto out; } } -- 2.26.2.windows.1