From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C7149A09E4 for ; Sun, 17 Jan 2021 10:11:23 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 936C7140D35; Sun, 17 Jan 2021 10:11:23 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by mails.dpdk.org (Postfix) with ESMTP id B5C8B140D35 for ; Sun, 17 Jan 2021 10:11:21 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from viacheslavo@nvidia.com) with SMTP; 17 Jan 2021 11:11:19 +0200 Received: from nvidia.com (pegasus11.mtr.labs.mlnx [10.210.16.104]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 10H9BJFA015760; Sun, 17 Jan 2021 11:11:19 +0200 From: Viacheslav Ovsiienko To: stable@dpdk.org Cc: ktraynor@redhat.com, Viacheslav Ovsiienko Date: Sun, 17 Jan 2021 11:11:17 +0200 Message-Id: <20210117091117.29601-1-viacheslavo@nvidia.com> X-Mailer: git-send-email 2.18.1 Subject: [dpdk-stable] [PATCH] [18.11] net/mlx5: fix UAR remap initialization for 32-bit systems X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" From: Viacheslav Ovsiienko The txq_uar_init() routine uses the uninitialized uar_mmap_offset field in 32-bit configurations due to this field is initialized after txq_uar_init() call. Fixes: 9d2cbd9ea8e7 ("net/mlx5: remove device register remap") Cc: stable@dpdk.org Signed-off-by: Viacheslav Ovsiienko Acked-by: Matan Azrad -- Note: there was no patch "net/mlx5: remove device register remap" in original 18.11, it was backported to 18.11 LTS later. --- drivers/net/mlx5/mlx5_txq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c index 862c7a90ec..089f9ab629 100644 --- a/drivers/net/mlx5/mlx5_txq.c +++ b/drivers/net/mlx5/mlx5_txq.c @@ -583,7 +583,6 @@ mlx5_txq_ibv_new(struct rte_eth_dev *dev, uint16_t idx) txq_ibv->cq = tmpl.cq; rte_atomic32_inc(&txq_ibv->refcnt); txq_ctrl->bf_reg = qp.bf.reg; - txq_uar_init(txq_ctrl); if (qp.comp_mask & MLX5DV_QP_MASK_UAR_MMAP_OFFSET) { txq_ctrl->uar_mmap_offset = qp.uar_mmap_offset; DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%"PRIx64, @@ -596,6 +595,7 @@ mlx5_txq_ibv_new(struct rte_eth_dev *dev, uint16_t idx) rte_errno = EINVAL; goto error; } + txq_uar_init(txq_ctrl); LIST_INSERT_HEAD(&priv->txqsibv, txq_ibv, next); txq_ibv->txq_ctrl = txq_ctrl; priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE; -- 2.18.1