From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EB0E8A054A for ; Thu, 18 Feb 2021 19:39:24 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D69A24003D; Thu, 18 Feb 2021 19:39:24 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by mails.dpdk.org (Postfix) with ESMTP id 5528A4003D for ; Thu, 18 Feb 2021 19:39:24 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from viacheslavo@nvidia.com) with SMTP; 18 Feb 2021 20:39:23 +0200 Received: from nvidia.com (pegasus11.mtr.labs.mlnx [10.210.16.104]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 11IIdNrI032253; Thu, 18 Feb 2021 20:39:23 +0200 From: Viacheslav Ovsiienko To: stable@dpdk.org Cc: bluca@debian.org, xuemingl@nvidia.com Date: Thu, 18 Feb 2021 20:39:22 +0200 Message-Id: <20210218183922.34371-1-viacheslavo@nvidia.com> X-Mailer: git-send-email 2.18.1 Subject: [dpdk-stable] [PATCH 20.11] net/mlx5: fix Tx queue size created with DevX X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" [ upstream commit 00984de53312b8af1bb1b6579d69a3eeda4be381 ] The number of descriptors specified for queue creation implies the queue should be able to contain the specified amount of packets being sent. Typically one packet takes one queue descriptor (WQE) to be handled. If there is inline data option enabled one packet might require more WQEs to embrace the inline data and the overall queue size (the number of queue descriptors) should be adjusted accordingly. In mlx5 PMD the queues can be created either via Verbs, using the rdma-core library or via DevX as direct kernel/firmware call. The rdma-core does queue size adjustment internally, depending on TSO and inline setting. The DevX approach missed this point. This caused the queue size discrepancy and performance variations. The patch adjusts the Tx queue size for the DevX approach in the same as it is done in rdma-core implementation. Fixes: 86d259cec852 ("net/mlx5: separate Tx queue object creations") Cc: stable@dpdk.org Signed-off-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_devx.c | 34 +++++++++++++++++++++++++++++----- 1 file changed, 29 insertions(+), 5 deletions(-) diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c index 0ac403b98..9970a5815 100644 --- a/drivers/net/mlx5/mlx5_devx.c +++ b/drivers/net/mlx5/mlx5_devx.c @@ -1299,12 +1299,15 @@ mlx5_txq_create_devx_cq_resources(struct rte_eth_dev *dev, uint16_t idx) * Pointer to Ethernet device. * @param idx * Queue index in DPDK Tx queue array. + * @param[in] log_desc_n + * Log of number of descriptors in queue. * * @return * Number of WQEs in SQ, 0 otherwise and rte_errno is set. */ static uint32_t -mlx5_txq_create_devx_sq_resources(struct rte_eth_dev *dev, uint16_t idx) +mlx5_txq_create_devx_sq_resources(struct rte_eth_dev *dev, uint16_t idx, + uint16_t log_desc_n) { struct mlx5_priv *priv = dev->data->dev_private; struct mlx5_txq_data *txq_data = (*priv->txqs)[idx]; @@ -1324,7 +1327,7 @@ mlx5_txq_create_devx_sq_resources(struct rte_eth_dev *dev, uint16_t idx) rte_errno = ENOMEM; return 0; } - wqe_n = RTE_MIN(1UL << txq_data->elts_n, + wqe_n = RTE_MIN(1UL << log_desc_n, (uint32_t)priv->sh->device_attr.max_qp_wr); txq_obj->sq_buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, wqe_n * sizeof(struct mlx5_wqe), @@ -1426,8 +1429,8 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx) struct mlx5_dev_ctx_shared *sh = priv->sh; struct mlx5_txq_obj *txq_obj = txq_ctrl->obj; void *reg_addr; - uint32_t cqe_n; - uint32_t wqe_n; + uint32_t cqe_n, log_desc_n; + uint32_t wqe_n, wqe_size; int ret = 0; MLX5_ASSERT(txq_data); @@ -1448,8 +1451,29 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx) txq_data->cq_db = (volatile uint32_t *)(txq_obj->cq_dbrec_page->dbrs + txq_obj->cq_dbrec_offset); *txq_data->cq_db = 0; + /* + * Adjust the amount of WQEs depending on inline settings. + * The number of descriptors should be enough to handle + * the specified number of packets. If queue is being created + * with Verbs the rdma-core does queue size adjustment + * internally in the mlx5_calc_sq_size(), we do the same + * for the queue being created with DevX at this point. + */ + wqe_size = txq_data->tso_en ? + RTE_ALIGN(txq_ctrl->max_tso_header, MLX5_WSEG_SIZE) : 0; + wqe_size += sizeof(struct mlx5_wqe_cseg) + + sizeof(struct mlx5_wqe_eseg) + + sizeof(struct mlx5_wqe_dseg); + if (txq_data->inlen_send) + wqe_size = RTE_MAX(wqe_size, sizeof(struct mlx5_wqe_cseg) + + sizeof(struct mlx5_wqe_eseg) + + RTE_ALIGN(txq_data->inlen_send + + sizeof(uint32_t), + MLX5_WSEG_SIZE)); + wqe_size = RTE_ALIGN(wqe_size, MLX5_WQE_SIZE) / MLX5_WQE_SIZE; /* Create Send Queue object with DevX. */ - wqe_n = mlx5_txq_create_devx_sq_resources(dev, idx); + log_desc_n = log2above((1UL << txq_data->elts_n) * wqe_size); + wqe_n = mlx5_txq_create_devx_sq_resources(dev, idx, log_desc_n); if (!wqe_n) { rte_errno = errno; goto error; -- 2.18.1