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From: Qi Zhang <qi.z.zhang@intel.com>
To: jingjing.wu@intel.com
Cc: arjun.anantharam@intel.com, timothy.miskell@intel.com,
	beilei.xing@intel.com, dev@dpdk.org,
	Qi Zhang <qi.z.zhang@intel.com>,
	stable@dpdk.org
Subject: [dpdk-stable] [PATCH] net/iavf: fix TSO max segment size
Date: Mon,  1 Mar 2021 15:57:14 +0800
Message-ID: <20210301075714.1636918-1-qi.z.zhang@intel.com> (raw)

According to Intel® AVF spec
(https://www.intel.com/content/dam/
www/public/us/en/documents/product-specifications/
ethernet-adaptive-virtual-function-hardware-spec.pdf)
section 2.2.2.3:
The max segment size(MSS) of TSO should not be set lower than 88.

Fixes: a2b29a7733ef ("net/avf: enable basic Rx Tx")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/iavf/iavf_rxtx.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/iavf/iavf_rxtx.h b/drivers/net/iavf/iavf_rxtx.h
index 922ddadad1..69979971fd 100644
--- a/drivers/net/iavf/iavf_rxtx.h
+++ b/drivers/net/iavf/iavf_rxtx.h
@@ -34,7 +34,7 @@
 #define DEFAULT_TX_RS_THRESH     32
 #define DEFAULT_TX_FREE_THRESH   32
 
-#define IAVF_MIN_TSO_MSS          256
+#define IAVF_MIN_TSO_MSS          88
 #define IAVF_MAX_TSO_MSS          9668
 #define IAVF_TSO_MAX_SEG          UINT8_MAX
 #define IAVF_TX_MAX_MTU_SEG       8
-- 
2.26.2


             reply	other threads:[~2021-03-01  7:53 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-01  7:57 Qi Zhang [this message]
2021-03-26  1:27 ` Xing, Beilei
2021-03-26  6:49   ` Zhang, Qi Z

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