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huawei.com; dkim=none (message not signed) header.d=none;huawei.com; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by DM6NAM11FT067.mail.protection.outlook.com (10.13.172.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4108.25 via Frontend Transport; Mon, 10 May 2021 16:18:28 +0000 Received: from nvidia.com (172.20.145.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 10 May 2021 16:18:26 +0000 From: Xueming Li To: Hongbo Zheng CC: Luca Boccassi , Min Hu , dpdk stable Date: Tue, 11 May 2021 00:01:44 +0800 Message-ID: <20210510160258.30982-155-xuemingl@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210510160258.30982-1-xuemingl@nvidia.com> References: <20210510160258.30982-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.145.6] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a07c866d-afd0-4cc3-3ba9-08d913cf3ef5 X-MS-TrafficTypeDiagnostic: DM6PR12MB5519: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:9508; 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PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(39860400002)(136003)(376002)(346002)(396003)(46966006)(36840700001)(6916009)(426003)(6666004)(356005)(82740400003)(7636003)(36860700001)(316002)(2616005)(54906003)(16526019)(2906002)(5660300002)(966005)(1076003)(478600001)(8936002)(8676002)(26005)(55016002)(83380400001)(6286002)(336012)(47076005)(82310400003)(70586007)(70206006)(186003)(4326008)(53546011)(36906005)(86362001)(7696005)(36756003); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 May 2021 16:18:28.3883 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a07c866d-afd0-4cc3-3ba9-08d913cf3ef5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT067.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB5519 Subject: [dpdk-stable] patch 'net/hns3: fix FLR miss detection' has been queued to stable release 20.11.2 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi, FYI, your patch has been queued to stable release 20.11.2 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 05/12/21. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/steevenlee/dpdk This queued commit can be viewed at: https://github.com/steevenlee/dpdk/commit/c718e751f438a527020ebbb44ab941be23153cc0 Thanks. Xueming Li --- >From c718e751f438a527020ebbb44ab941be23153cc0 Mon Sep 17 00:00:00 2001 From: Hongbo Zheng Date: Wed, 31 Mar 2021 18:01:37 +0800 Subject: [PATCH] net/hns3: fix FLR miss detection Cc: Luca Boccassi [ upstream commit 32040ae365735f94253ce317b4b01e8bc4ea9c6b ] When FLR occurs, the head pointer register of the command queue will be cleared, resulting in abnormal detection of the head pointer register of the command queue. At present, FLR is detected in this way, and the reset recovery process is executed. However, when FLR occurs, the header pointer register of the command queue is not necessarily abnormal. For example, when the driver runs normally, the value of the header pointer register of the command queue may also be 0, which will lead to the miss detection of FLR. Therefore, the judgment that whether the base address register of command queue is 0 is added to ensure that FLR not miss detection. Fixes: 2790c6464725 ("net/hns3: support device reset") Signed-off-by: Hongbo Zheng Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_cmd.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/net/hns3/hns3_cmd.c b/drivers/net/hns3/hns3_cmd.c index 5f6bdbd42f..8a48714a54 100644 --- a/drivers/net/hns3/hns3_cmd.c +++ b/drivers/net/hns3/hns3_cmd.c @@ -195,12 +195,14 @@ hns3_cmd_csq_clean(struct hns3_hw *hw) { struct hns3_cmq_ring *csq = &hw->cmq.csq; uint32_t head; + uint32_t addr; int clean; head = hns3_read_dev(hw, HNS3_CMDQ_TX_HEAD_REG); - if (!is_valid_csq_clean_head(csq, head)) { - hns3_err(hw, "wrong cmd head (%u, %u-%u)", head, - csq->next_to_use, csq->next_to_clean); + addr = hns3_read_dev(hw, HNS3_CMDQ_TX_ADDR_L_REG); + if (!is_valid_csq_clean_head(csq, head) || addr == 0) { + hns3_err(hw, "wrong cmd addr(%0x) head (%u, %u-%u)", addr, head, + csq->next_to_use, csq->next_to_clean); if (rte_eal_process_type() == RTE_PROC_PRIMARY) { rte_atomic16_set(&hw->reset.disable_cmd, 1); hns3_schedule_delayed_reset(HNS3_DEV_HW_TO_ADAPTER(hw)); -- 2.25.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2021-05-10 23:59:30.637170500 +0800 +++ 0156-net-hns3-fix-FLR-miss-detection.patch 2021-05-10 23:59:26.600000000 +0800 @@ -1 +1 @@ -From 32040ae365735f94253ce317b4b01e8bc4ea9c6b Mon Sep 17 00:00:00 2001 +From c718e751f438a527020ebbb44ab941be23153cc0 Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Luca Boccassi + +[ upstream commit 32040ae365735f94253ce317b4b01e8bc4ea9c6b ] @@ -25 +27,0 @@ -Cc: stable@dpdk.org @@ -34 +36 @@ -index 22453b0832..1d8ef7a812 100644 +index 5f6bdbd42f..8a48714a54 100644 @@ -53,2 +55,2 @@ - __atomic_store_n(&hw->reset.disable_cmd, 1, - __ATOMIC_RELAXED); + rte_atomic16_set(&hw->reset.disable_cmd, 1); + hns3_schedule_delayed_reset(HNS3_DEV_HW_TO_ADAPTER(hw));