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intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by BN8NAM11FT014.mail.protection.outlook.com (10.13.177.142) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4108.25 via Frontend Transport; Mon, 10 May 2021 16:25:23 +0000 Received: from nvidia.com (172.20.145.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 10 May 2021 16:25:20 +0000 From: Xueming Li To: Alvin Zhang CC: Luca Boccassi , Haiyue Wang , dpdk stable Date: Tue, 11 May 2021 00:02:53 +0800 Message-ID: <20210510160258.30982-224-xuemingl@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210510160258.30982-1-xuemingl@nvidia.com> References: <20210510160258.30982-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.145.6] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 1589bf5d-73d2-40cc-3618-08d913d03657 X-MS-TrafficTypeDiagnostic: SJ0PR12MB5438: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:10000; 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PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(346002)(396003)(136003)(39860400002)(376002)(36840700001)(46966006)(47076005)(70586007)(1076003)(26005)(82740400003)(54906003)(7636003)(966005)(356005)(7696005)(8936002)(82310400003)(70206006)(186003)(36860700001)(53546011)(8676002)(36756003)(83380400001)(55016002)(5660300002)(426003)(36906005)(16526019)(478600001)(2616005)(6286002)(6666004)(4326008)(86362001)(316002)(336012)(6916009)(2906002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 May 2021 16:25:23.3607 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1589bf5d-73d2-40cc-3618-08d913d03657 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT014.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB5438 Subject: [dpdk-stable] patch 'net/igc: fix Rx packet size' has been queued to stable release 20.11.2 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi, FYI, your patch has been queued to stable release 20.11.2 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 05/12/21. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/steevenlee/dpdk This queued commit can be viewed at: https://github.com/steevenlee/dpdk/commit/8d6377e17251bff5e4e6d623ad7c751340b809bb Thanks. Xueming Li --- >From 8d6377e17251bff5e4e6d623ad7c751340b809bb Mon Sep 17 00:00:00 2001 From: Alvin Zhang Date: Tue, 20 Apr 2021 10:05:20 +0800 Subject: [PATCH] net/igc: fix Rx packet size Cc: Luca Boccassi [ upstream commit be1fb9fe3cc8d2a70b76ba243eb19a4255cd8cd2 ] When DEV_RX_OFFLOAD_KEEP_CRC is enabled, the PMD will minus 4 bytes of CRC from the size of a packet, but the NIC will strip the CRC because the CRC strip bit in DVMOLR register is not cleared. This will cause the size of a packet to be 4 bytes less. This patch updates the CRC strip bit according to whether DEV_RX_OFFLOAD_KEEP_CRC is enabled. Fixes: a5aeb2b9e225 ("net/igc: support Rx and Tx") Signed-off-by: Alvin Zhang Acked-by: Haiyue Wang --- drivers/net/igc/igc_txrx.c | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/drivers/net/igc/igc_txrx.c b/drivers/net/igc/igc_txrx.c index 4654ec41f0..c0b56e4c9b 100644 --- a/drivers/net/igc/igc_txrx.c +++ b/drivers/net/igc/igc_txrx.c @@ -1290,20 +1290,24 @@ igc_rx_init(struct rte_eth_dev *dev) * This needs to be done after enable. */ for (i = 0; i < dev->data->nb_rx_queues; i++) { + uint32_t dvmolr; + rxq = dev->data->rx_queues[i]; IGC_WRITE_REG(hw, IGC_RDH(rxq->reg_idx), 0); - IGC_WRITE_REG(hw, IGC_RDT(rxq->reg_idx), - rxq->nb_rx_desc - 1); + IGC_WRITE_REG(hw, IGC_RDT(rxq->reg_idx), rxq->nb_rx_desc - 1); - /* strip queue vlan offload */ - if (rxq->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) { - uint32_t dvmolr; - dvmolr = IGC_READ_REG(hw, IGC_DVMOLR(rxq->queue_id)); + dvmolr = IGC_READ_REG(hw, IGC_DVMOLR(rxq->reg_idx)); + if (rxq->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) + dvmolr |= IGC_DVMOLR_STRVLAN; + else + dvmolr &= ~IGC_DVMOLR_STRVLAN; - /* If vlan been stripped off, the CRC is meaningless. */ - dvmolr |= IGC_DVMOLR_STRVLAN | IGC_DVMOLR_STRCRC; - IGC_WRITE_REG(hw, IGC_DVMOLR(rxq->reg_idx), dvmolr); - } + if (offloads & DEV_RX_OFFLOAD_KEEP_CRC) + dvmolr &= ~IGC_DVMOLR_STRCRC; + else + dvmolr |= IGC_DVMOLR_STRCRC; + + IGC_WRITE_REG(hw, IGC_DVMOLR(rxq->reg_idx), dvmolr); } return 0; @@ -2266,12 +2270,10 @@ eth_igc_vlan_strip_queue_set(struct rte_eth_dev *dev, reg_val = IGC_READ_REG(hw, IGC_DVMOLR(rx_queue_id)); if (on) { - /* If vlan been stripped off, the CRC is meaningless. */ - reg_val |= IGC_DVMOLR_STRVLAN | IGC_DVMOLR_STRCRC; + reg_val |= IGC_DVMOLR_STRVLAN; rxq->offloads |= DEV_RX_OFFLOAD_VLAN_STRIP; } else { - reg_val &= ~(IGC_DVMOLR_STRVLAN | IGC_DVMOLR_HIDVLAN | - IGC_DVMOLR_STRCRC); + reg_val &= ~(IGC_DVMOLR_STRVLAN | IGC_DVMOLR_HIDVLAN); rxq->offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP; } -- 2.25.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2021-05-10 23:59:32.357936500 +0800 +++ 0225-net-igc-fix-Rx-packet-size.patch 2021-05-10 23:59:26.710000000 +0800 @@ -1 +1 @@ -From be1fb9fe3cc8d2a70b76ba243eb19a4255cd8cd2 Mon Sep 17 00:00:00 2001 +From 8d6377e17251bff5e4e6d623ad7c751340b809bb Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Luca Boccassi + +[ upstream commit be1fb9fe3cc8d2a70b76ba243eb19a4255cd8cd2 ] @@ -15 +17,0 @@ -Cc: stable@dpdk.org @@ -24 +26 @@ -index 8eaed728cc..b5489eedd2 100644 +index 4654ec41f0..c0b56e4c9b 100644 @@ -27 +29 @@ -@@ -1291,20 +1291,24 @@ igc_rx_init(struct rte_eth_dev *dev) +@@ -1290,20 +1290,24 @@ igc_rx_init(struct rte_eth_dev *dev) @@ -62 +64 @@ -@@ -2267,12 +2271,10 @@ eth_igc_vlan_strip_queue_set(struct rte_eth_dev *dev, +@@ -2266,12 +2270,10 @@ eth_igc_vlan_strip_queue_set(struct rte_eth_dev *dev,