patches for DPDK stable branches
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From: Christian Ehrhardt <christian.ehrhardt@canonical.com>
To: Adam Dybkowski <adamx.dybkowski@intel.com>
Cc: Fan Zhang <roy.fan.zhang@intel.com>, dpdk stable <stable@dpdk.org>
Subject: [dpdk-stable] patch 'compress/qat: enable compression on GEN3' has been queued to stable release 19.11.9
Date: Mon, 17 May 2021 18:21:20 +0200
Message-ID: <20210517162125.3178901-16-christian.ehrhardt@canonical.com> (raw)
In-Reply-To: <20210517162125.3178901-1-christian.ehrhardt@canonical.com>

Hi,

FYI, your patch has been queued to stable release 19.11.9

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 05/19/21. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/cpaelzer/dpdk-stable-queue

This queued commit can be viewed at:
https://github.com/cpaelzer/dpdk-stable-queue/commit/0f1d70e943e766b18407106d191608866bbce151

Thanks.

Christian Ehrhardt <christian.ehrhardt@canonical.com>

---
From 0f1d70e943e766b18407106d191608866bbce151 Mon Sep 17 00:00:00 2001
From: Adam Dybkowski <adamx.dybkowski@intel.com>
Date: Wed, 28 Apr 2021 15:41:42 +0100
Subject: [PATCH] compress/qat: enable compression on GEN3

[ upstream commit da573c0e4205d818cd602eaa27c720896f3b6f1c ]

This patch enables the compression on QAT GEN3 (on hardware
versions that support it) and changes the error message shown
on older hardware versions that don't support the compression.

It also fixes the crash that happened on IM buffer allocation
failure (not enough memory) during the PMD cleaning phase.

Fixes: a124830a6f00 ("compress/qat: enable dynamic huffman encoding")
Fixes: 352332744c3a ("compress/qat: add dynamic SGL allocation")

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
---
 drivers/compress/qat/qat_comp.c     |   7 +-
 drivers/compress/qat/qat_comp_pmd.c | 111 +++++++++++++++++++---------
 2 files changed, 79 insertions(+), 39 deletions(-)

diff --git a/drivers/compress/qat/qat_comp.c b/drivers/compress/qat/qat_comp.c
index 533e34f6bb..cd06809463 100644
--- a/drivers/compress/qat/qat_comp.c
+++ b/drivers/compress/qat/qat_comp.c
@@ -68,8 +68,8 @@ qat_comp_build_request(void *in_op, uint8_t *out_msg,
 					ICP_QAT_FW_COMP_EOP
 				      : ICP_QAT_FW_COMP_NOT_EOP,
 				ICP_QAT_FW_COMP_NOT_BFINAL,
-				ICP_QAT_FW_COMP_NO_CNV,
-				ICP_QAT_FW_COMP_NO_CNV_RECOVERY);
+				ICP_QAT_FW_COMP_CNV,
+				ICP_QAT_FW_COMP_CNV_RECOVERY);
 	}
 
 	if (likely(qat_xform->qat_comp_request_type ==
@@ -286,7 +286,8 @@ qat_comp_process_response(void **op, uint8_t *resp, void *op_cookie,
 			rx_op->status = RTE_COMP_OP_STATUS_ERROR;
 			rx_op->debug_status = ERR_CODE_QAT_COMP_WRONG_FW;
 			*op = (void *)rx_op;
-			QAT_DP_LOG(ERR, "QAT has wrong firmware");
+			QAT_DP_LOG(ERR,
+					"This QAT hardware doesn't support compression operation");
 			++(*dequeue_err_count);
 			return 0;
 		}
diff --git a/drivers/compress/qat/qat_comp_pmd.c b/drivers/compress/qat/qat_comp_pmd.c
index 5cdabadef7..dafd3da317 100644
--- a/drivers/compress/qat/qat_comp_pmd.c
+++ b/drivers/compress/qat/qat_comp_pmd.c
@@ -82,13 +82,13 @@ qat_comp_qp_release(struct rte_compressdev *dev, uint16_t queue_pair_id)
 	qat_private->qat_dev->qps_in_use[QAT_SERVICE_COMPRESSION][queue_pair_id]
 						= NULL;
 
-	for (i = 0; i < qp->nb_descriptors; i++) {
-
-		struct qat_comp_op_cookie *cookie = qp->op_cookies[i];
+	if (qp != NULL)
+		for (i = 0; i < qp->nb_descriptors; i++) {
+			struct qat_comp_op_cookie *cookie = qp->op_cookies[i];
 
-		rte_free(cookie->qat_sgl_src_d);
-		rte_free(cookie->qat_sgl_dst_d);
-	}
+			rte_free(cookie->qat_sgl_src_d);
+			rte_free(cookie->qat_sgl_dst_d);
+		}
 
 	return qat_qp_release((struct qat_qp **)
 			&(dev->data->queue_pairs[queue_pair_id]));
@@ -196,7 +196,7 @@ qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,
 	struct array_of_ptrs *array_of_pointers;
 	int size_of_ptr_array;
 	uint32_t full_size;
-	uint32_t offset_of_sgls, offset_of_flat_buffs = 0;
+	uint32_t offset_of_flat_buffs;
 	int i;
 	int num_im_sgls = qat_gen_config[
 		comp_dev->qat_dev->qat_dev_gen].comp_num_im_bufs_required;
@@ -211,31 +211,31 @@ qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,
 		return memzone;
 	}
 
-	/* Create a memzone to hold intermediate buffers and associated
-	 * meta-data needed by the firmware. The memzone contains 3 parts:
+	/* Create multiple memzones to hold intermediate buffers and associated
+	 * meta-data needed by the firmware.
+	 * The first memzone contains:
 	 *  - a list of num_im_sgls physical pointers to sgls
-	 *  - the num_im_sgl sgl structures, each pointing to
-	 *    QAT_NUM_BUFS_IN_IM_SGL flat buffers
-	 *  - the flat buffers: num_im_sgl * QAT_NUM_BUFS_IN_IM_SGL
-	 *    buffers, each of buff_size
+	 * All other memzones contain:
+	 *  - the sgl structure, pointing to QAT_NUM_BUFS_IN_IM_SGL flat buffers
+	 *  - the flat buffers: QAT_NUM_BUFS_IN_IM_SGL buffers,
+	 *    each of buff_size
 	 * num_im_sgls depends on the hardware generation of the device
 	 * buff_size comes from the user via the config file
 	 */
 
 	size_of_ptr_array = num_im_sgls * sizeof(phys_addr_t);
-	offset_of_sgls = (size_of_ptr_array + (~QAT_64_BYTE_ALIGN_MASK))
-			& QAT_64_BYTE_ALIGN_MASK;
-	offset_of_flat_buffs =
-	    offset_of_sgls + num_im_sgls * sizeof(struct qat_inter_sgl);
+	offset_of_flat_buffs = sizeof(struct qat_inter_sgl);
 	full_size = offset_of_flat_buffs +
-			num_im_sgls * buff_size * QAT_NUM_BUFS_IN_IM_SGL;
+			buff_size * QAT_NUM_BUFS_IN_IM_SGL;
 
-	memzone = rte_memzone_reserve_aligned(inter_buff_mz_name, full_size,
+	memzone = rte_memzone_reserve_aligned(inter_buff_mz_name,
+			size_of_ptr_array,
 			comp_dev->compressdev->data->socket_id,
 			RTE_MEMZONE_IOVA_CONTIG, QAT_64_BYTE_ALIGN);
 	if (memzone == NULL) {
-		QAT_LOG(ERR, "Can't allocate intermediate buffers"
-				" for device %s", comp_dev->qat_dev->name);
+		QAT_LOG(ERR,
+				"Can't allocate intermediate buffers for device %s",
+				comp_dev->qat_dev->name);
 		return NULL;
 	}
 
@@ -244,17 +244,50 @@ qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,
 	QAT_LOG(DEBUG, "Memzone %s: addr = %p, phys = 0x%"PRIx64
 			", size required %d, size created %zu",
 			inter_buff_mz_name, mz_start, mz_start_phys,
-			full_size, memzone->len);
+			size_of_ptr_array, memzone->len);
 
 	array_of_pointers = (struct array_of_ptrs *)mz_start;
 	for (i = 0; i < num_im_sgls; i++) {
-		uint32_t curr_sgl_offset =
-		    offset_of_sgls + i * sizeof(struct qat_inter_sgl);
-		struct qat_inter_sgl *sgl =
-		    (struct qat_inter_sgl *)(mz_start +	curr_sgl_offset);
+		const struct rte_memzone *mz;
+		struct qat_inter_sgl *sgl;
 		int lb;
-		array_of_pointers->pointer[i] = mz_start_phys + curr_sgl_offset;
 
+		snprintf(inter_buff_mz_name, RTE_MEMZONE_NAMESIZE,
+				"%s_inter_buff_%d", comp_dev->qat_dev->name, i);
+		mz = rte_memzone_lookup(inter_buff_mz_name);
+		if (mz == NULL) {
+			mz = rte_memzone_reserve_aligned(inter_buff_mz_name,
+					full_size,
+					comp_dev->compressdev->data->socket_id,
+					RTE_MEMZONE_IOVA_CONTIG,
+					QAT_64_BYTE_ALIGN);
+			if (mz == NULL) {
+				QAT_LOG(ERR,
+						"Can't allocate intermediate buffers for device %s",
+						comp_dev->qat_dev->name);
+				while (--i >= 0) {
+					snprintf(inter_buff_mz_name,
+							RTE_MEMZONE_NAMESIZE,
+							"%s_inter_buff_%d",
+							comp_dev->qat_dev->name,
+							i);
+					rte_memzone_free(
+							rte_memzone_lookup(
+							inter_buff_mz_name));
+				}
+				rte_memzone_free(memzone);
+				return NULL;
+			}
+		}
+
+		QAT_LOG(DEBUG, "Memzone %s: addr = %p, phys = 0x%"PRIx64
+				", size required %d, size created %zu",
+				inter_buff_mz_name, mz->addr, mz->iova,
+				full_size, mz->len);
+
+		array_of_pointers->pointer[i] = mz->iova;
+
+		sgl = (struct qat_inter_sgl *) mz->addr;
 		sgl->num_bufs = QAT_NUM_BUFS_IN_IM_SGL;
 		sgl->num_mapped_bufs = 0;
 		sgl->resrvd = 0;
@@ -266,8 +299,8 @@ qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,
 #endif
 		for (lb = 0; lb < QAT_NUM_BUFS_IN_IM_SGL; lb++) {
 			sgl->buffers[lb].addr =
-			  mz_start_phys + offset_of_flat_buffs +
-			  (((i * QAT_NUM_BUFS_IN_IM_SGL) + lb) * buff_size);
+					mz->iova + offset_of_flat_buffs +
+					lb * buff_size;
 			sgl->buffers[lb].len = buff_size;
 			sgl->buffers[lb].resrvd = 0;
 #if QAT_IM_BUFFER_DEBUG
@@ -279,7 +312,7 @@ qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,
 	}
 #if QAT_IM_BUFFER_DEBUG
 	QAT_DP_HEXDUMP_LOG(DEBUG,  "IM buffer memzone start:",
-			mz_start, offset_of_flat_buffs + 32);
+			memzone->addr, size_of_ptr_array);
 #endif
 	return memzone;
 }
@@ -442,6 +475,16 @@ _qat_comp_dev_config_clear(struct qat_comp_dev_private *comp_dev)
 {
 	/* Free intermediate buffers */
 	if (comp_dev->interm_buff_mz) {
+		char mz_name[RTE_MEMZONE_NAMESIZE];
+		int i = qat_gen_config[
+		      comp_dev->qat_dev->qat_dev_gen].comp_num_im_bufs_required;
+
+		while (--i >= 0) {
+			snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
+					"%s_inter_buff_%d",
+					comp_dev->qat_dev->name, i);
+			rte_memzone_free(rte_memzone_lookup(mz_name));
+		}
 		rte_memzone_free(comp_dev->interm_buff_mz);
 		comp_dev->interm_buff_mz = NULL;
 	}
@@ -619,7 +662,8 @@ qat_comp_pmd_dequeue_frst_op_burst(void *qp, struct rte_comp_op **ops,
 
 			tmp_qp->qat_dev->comp_dev->compressdev->dev_ops =
 					&compress_qat_dummy_ops;
-			QAT_LOG(ERR, "QAT PMD detected wrong FW version !");
+			QAT_LOG(ERR,
+					"This QAT hardware doesn't support compression operation");
 
 		} else {
 			tmp_qp->qat_dev->comp_dev->compressdev->dequeue_burst =
@@ -667,11 +711,6 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,
 	int i = 0;
 	struct qat_device_info *qat_dev_instance =
 			&qat_pci_devs[qat_pci_dev->qat_dev_id];
-	if (qat_pci_dev->qat_dev_gen == QAT_GEN3) {
-		QAT_LOG(ERR, "Compression PMD not supported on QAT c4xxx");
-		return 0;
-	}
-
 	struct rte_compressdev_pmd_init_params init_params = {
 		.name = "",
 		.socket_id = qat_dev_instance->pci_dev->device.numa_node,
-- 
2.31.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2021-05-17 17:40:37.376292689 +0200
+++ 0205-compress-qat-enable-compression-on-GEN3.patch	2021-05-17 17:40:29.583812721 +0200
@@ -1 +1 @@
-From da573c0e4205d818cd602eaa27c720896f3b6f1c Mon Sep 17 00:00:00 2001
+From 0f1d70e943e766b18407106d191608866bbce151 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit da573c0e4205d818cd602eaa27c720896f3b6f1c ]
+
@@ -15 +16,0 @@
-Cc: stable@dpdk.org
@@ -25 +26 @@
-index 3a064ec3b2..7ac25a3b4c 100644
+index 533e34f6bb..cd06809463 100644
@@ -28 +29 @@
-@@ -191,8 +191,8 @@ qat_comp_build_request(void *in_op, uint8_t *out_msg,
+@@ -68,8 +68,8 @@ qat_comp_build_request(void *in_op, uint8_t *out_msg,
@@ -38,2 +39,2 @@
- 	/* common for sgl and flat buffers */
-@@ -603,7 +603,8 @@ qat_comp_process_response(void **op, uint8_t *resp, void *op_cookie,
+ 	if (likely(qat_xform->qat_comp_request_type ==
+@@ -286,7 +286,8 @@ qat_comp_process_response(void **op, uint8_t *resp, void *op_cookie,
@@ -47 +48 @@
- 			return 1;
+ 			return 0;
@@ -50 +51 @@
-index 18ecb34ba7..8de41f6b6e 100644
+index 5cdabadef7..dafd3da317 100644
@@ -73 +74 @@
-@@ -198,7 +198,7 @@ qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,
+@@ -196,7 +196,7 @@ qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,
@@ -82 +83 @@
-@@ -213,31 +213,31 @@ qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,
+@@ -211,31 +211,31 @@ qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,
@@ -128 +129 @@
-@@ -246,17 +246,50 @@ qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,
+@@ -244,17 +244,50 @@ qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,
@@ -185 +186 @@
-@@ -268,8 +301,8 @@ qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,
+@@ -266,8 +299,8 @@ qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,
@@ -196 +197 @@
-@@ -281,7 +314,7 @@ qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,
+@@ -279,7 +312,7 @@ qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,
@@ -205 +206 @@
-@@ -444,6 +477,16 @@ _qat_comp_dev_config_clear(struct qat_comp_dev_private *comp_dev)
+@@ -442,6 +475,16 @@ _qat_comp_dev_config_clear(struct qat_comp_dev_private *comp_dev)
@@ -222 +223 @@
-@@ -607,7 +650,8 @@ qat_comp_pmd_dequeue_first_op_burst(void *qp, struct rte_comp_op **ops,
+@@ -619,7 +662,8 @@ qat_comp_pmd_dequeue_frst_op_burst(void *qp, struct rte_comp_op **ops,
@@ -232 +233 @@
-@@ -656,11 +700,6 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,
+@@ -667,11 +711,6 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,

  parent reply	other threads:[~2021-05-17 16:22 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-17 16:21 [dpdk-stable] patch 'test/distributor: fix burst flush on worker quit' " Christian Ehrhardt
2021-05-17 16:21 ` [dpdk-stable] patch 'net/virtio: fix vectorized Rx queue rearm' " Christian Ehrhardt
2021-05-17 16:21 ` [dpdk-stable] patch 'net/bnxt: refactor multi-queue Rx configuration' " Christian Ehrhardt
2021-05-17 16:21 ` [dpdk-stable] patch 'net/bnxt: fix Rx timestamp when FIFO pending bit is set' " Christian Ehrhardt
2021-05-17 16:21 ` [dpdk-stable] patch 'net/bnxt: fix dynamic VNIC count' " Christian Ehrhardt
2021-05-17 16:21 ` [dpdk-stable] patch 'net/bnxt: fix single PF per port check' " Christian Ehrhardt
2021-05-17 16:21 ` [dpdk-stable] patch 'net/bnxt: fix mismatched type comparison in MAC restore' " Christian Ehrhardt
2021-05-17 16:21 ` [dpdk-stable] patch 'net/bnxt: check PCI config read' " Christian Ehrhardt
2021-05-17 16:21 ` [dpdk-stable] patch 'net/bnxt: prevent device access in error state' " Christian Ehrhardt
2021-05-17 16:21 ` [dpdk-stable] patch 'raw/ntb: check SPAD user index' " Christian Ehrhardt
2021-05-17 16:21 ` [dpdk-stable] patch 'raw/ntb: check memory allocations' " Christian Ehrhardt
2021-05-17 16:21 ` [dpdk-stable] patch 'ipc: check malloc sync reply result' " Christian Ehrhardt
2021-05-17 16:21 ` [dpdk-stable] patch 'eal: fix service core list parsing' " Christian Ehrhardt
2021-05-17 16:21 ` [dpdk-stable] patch 'app/bbdev: fix HARQ error messages' " Christian Ehrhardt
2021-05-17 16:21 ` [dpdk-stable] patch 'common/qat: increase IM buffer size for GEN3' " Christian Ehrhardt
2021-05-17 16:21 ` Christian Ehrhardt [this message]
2021-05-17 16:21 ` [dpdk-stable] patch 'test/crypto: fix auth-cipher compare length in OOP' " Christian Ehrhardt
2021-05-17 16:21 ` [dpdk-stable] patch 'crypto/dpaa_sec: affine the thread portal affinity' " Christian Ehrhardt
2021-05-17 16:21 ` [dpdk-stable] patch 'crypto/dpaa2_sec: fix close and uninit functions' " Christian Ehrhardt
2021-05-17 16:21 ` [dpdk-stable] patch 'test/crypto: copy offset data to OOP destination buffer' " Christian Ehrhardt
2021-05-17 16:21 ` [dpdk-stable] patch 'doc: fix build with Sphinx 4' " Christian Ehrhardt

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