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amazon.com; dkim=none (message not signed) header.d=none;amazon.com; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by BN8NAM11FT023.mail.protection.outlook.com (10.13.177.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4219.21 via Frontend Transport; Fri, 11 Jun 2021 23:15:25 +0000 Received: from nvidia.com (172.20.187.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 11 Jun 2021 23:15:23 +0000 From: Xueming Li To: Michal Krawczyk CC: Luca Boccassi , Igor Chauskin , Guy Tzalik , dpdk stable Date: Sat, 12 Jun 2021 07:03:25 +0800 Message-ID: <20210611230433.8208-111-xuemingl@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611230433.8208-1-xuemingl@nvidia.com> References: <20210510160258.30982-229-xuemingl@nvidia.com> <20210611230433.8208-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL105.nvidia.com (172.20.187.12) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: fc8fb901-f30c-4063-a31a-08d92d2ecb6b X-MS-TrafficTypeDiagnostic: DM6PR12MB3644: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4941; 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SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(396003)(136003)(376002)(346002)(39860400002)(46966006)(36840700001)(83380400001)(36906005)(5660300002)(82310400003)(6916009)(47076005)(1076003)(86362001)(2906002)(316002)(4326008)(6286002)(53546011)(7636003)(7696005)(55016002)(356005)(36756003)(186003)(26005)(16526019)(82740400003)(966005)(36860700001)(8936002)(8676002)(2616005)(478600001)(54906003)(70206006)(336012)(70586007)(426003); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Jun 2021 23:15:25.2391 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fc8fb901-f30c-4063-a31a-08d92d2ecb6b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT023.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3644 Subject: [dpdk-stable] patch 'net/ena/base: fix type conversions by explicit casting' has been queued to stable release 20.11.2 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi, FYI, your patch has been queued to stable release 20.11.2 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 06/14/21. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/steevenlee/dpdk This queued commit can be viewed at: https://github.com/steevenlee/dpdk/commit/74cc4f7d974f623aa90ef6d1b71e80284792bb0e Thanks. Xueming Li --- >From 74cc4f7d974f623aa90ef6d1b71e80284792bb0e Mon Sep 17 00:00:00 2001 From: Michal Krawczyk Date: Tue, 11 May 2021 08:45:40 +0200 Subject: [PATCH] net/ena/base: fix type conversions by explicit casting Cc: Luca Boccassi [ upstream commit 83e8d5378d3f2eef749d47bb1145c29cc797a277 ] To silence error messages from the static code analysis, make the type conversions explicit where they're intended. Also fix the type for the DMA width value. Fixes: 99ecfbf845b3 ("ena: import communication layer") Signed-off-by: Michal Krawczyk Reviewed-by: Igor Chauskin Reviewed-by: Guy Tzalik --- drivers/net/ena/base/ena_com.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/ena/base/ena_com.c b/drivers/net/ena/base/ena_com.c index e137d5078b..ae69b63602 100644 --- a/drivers/net/ena/base/ena_com.c +++ b/drivers/net/ena/base/ena_com.c @@ -1366,7 +1366,7 @@ int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue, ena_trc_err("Failed to submit command [%ld]\n", PTR_ERR(comp_ctx)); - return PTR_ERR(comp_ctx); + return (int)PTR_ERR(comp_ctx); } ret = ena_com_wait_and_process_admin_cq(comp_ctx, admin_queue); @@ -1586,7 +1586,7 @@ int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag) int ena_com_get_dma_width(struct ena_com_dev *ena_dev) { u32 caps = ena_com_reg_bar_read32(ena_dev, ENA_REGS_CAPS_OFF); - int width; + u32 width; if (unlikely(caps == ENA_MMIO_READ_TIMEOUT)) { ena_trc_err("Reg read timeout occurred\n"); @@ -2264,7 +2264,7 @@ int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, int mtu) cmd.aq_common_descriptor.opcode = ENA_ADMIN_SET_FEATURE; cmd.aq_common_descriptor.flags = 0; cmd.feat_common.feature_id = ENA_ADMIN_MTU; - cmd.u.mtu.mtu = mtu; + cmd.u.mtu.mtu = (u32)mtu; ret = ena_com_execute_admin_command(admin_queue, (struct ena_admin_aq_entry *)&cmd, @@ -2675,7 +2675,7 @@ int ena_com_indirect_table_set(struct ena_com_dev *ena_dev) return ret; } - cmd.control_buffer.length = (1ULL << rss->tbl_log_size) * + cmd.control_buffer.length = (u32)(1ULL << rss->tbl_log_size) * sizeof(struct ena_admin_rss_ind_table_entry); ret = ena_com_execute_admin_command(admin_queue, @@ -2697,7 +2697,7 @@ int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl) u32 tbl_size; int i, rc; - tbl_size = (1ULL << rss->tbl_log_size) * + tbl_size = (u32)(1ULL << rss->tbl_log_size) * sizeof(struct ena_admin_rss_ind_table_entry); rc = ena_com_get_feature_ex(ena_dev, &get_resp, -- 2.25.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2021-06-12 06:53:59.454597300 +0800 +++ 0111-net-ena-base-fix-type-conversions-by-explicit-castin.patch 2021-06-12 06:53:56.490000000 +0800 @@ -1 +1 @@ -From 83e8d5378d3f2eef749d47bb1145c29cc797a277 Mon Sep 17 00:00:00 2001 +From 74cc4f7d974f623aa90ef6d1b71e80284792bb0e Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Luca Boccassi + +[ upstream commit 83e8d5378d3f2eef749d47bb1145c29cc797a277 ] @@ -12 +14,0 @@ -Cc: stable@dpdk.org @@ -22 +24 @@ -index 9dc9f280c4..0cdeb1a2d9 100644 +index e137d5078b..ae69b63602 100644 @@ -25,2 +27,2 @@ -@@ -1382,7 +1382,7 @@ int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue, - "Failed to submit command [%ld]\n", +@@ -1366,7 +1366,7 @@ int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue, + ena_trc_err("Failed to submit command [%ld]\n", @@ -34 +36 @@ -@@ -1602,7 +1602,7 @@ int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag) +@@ -1586,7 +1586,7 @@ int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag) @@ -42,2 +44,2 @@ - ena_trc_err(ena_dev, "Reg read timeout occurred\n"); -@@ -2280,7 +2280,7 @@ int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, int mtu) + ena_trc_err("Reg read timeout occurred\n"); +@@ -2264,7 +2264,7 @@ int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, int mtu) @@ -52 +54 @@ -@@ -2691,7 +2691,7 @@ int ena_com_indirect_table_set(struct ena_com_dev *ena_dev) +@@ -2675,7 +2675,7 @@ int ena_com_indirect_table_set(struct ena_com_dev *ena_dev) @@ -61 +63 @@ -@@ -2713,7 +2713,7 @@ int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl) +@@ -2697,7 +2697,7 @@ int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl)