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huawei.com; dkim=none (message not signed) header.d=none;huawei.com; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by DM6NAM11FT005.mail.protection.outlook.com (10.13.172.238) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4219.21 via Frontend Transport; Fri, 11 Jun 2021 23:20:50 +0000 Received: from nvidia.com (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 11 Jun 2021 23:20:47 +0000 From: Xueming Li To: Huisong Li CC: Luca Boccassi , Min Hu , dpdk stable Date: Sat, 12 Jun 2021 07:04:24 +0800 Message-ID: <20210611230433.8208-170-xuemingl@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611230433.8208-1-xuemingl@nvidia.com> References: <20210510160258.30982-229-xuemingl@nvidia.com> <20210611230433.8208-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL105.nvidia.com (172.20.187.12) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 01027037-d623-4c54-71a7-08d92d2f8d56 X-MS-TrafficTypeDiagnostic: BN8PR12MB3139: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:10000; 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SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(346002)(396003)(39860400002)(136003)(376002)(36840700001)(46966006)(6666004)(83380400001)(316002)(82740400003)(70586007)(8936002)(356005)(36756003)(5660300002)(186003)(26005)(2616005)(7636003)(47076005)(478600001)(53546011)(54906003)(8676002)(4326008)(426003)(86362001)(36906005)(82310400003)(6916009)(1076003)(336012)(2906002)(16526019)(70206006)(55016002)(7696005)(6286002)(966005)(36860700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Jun 2021 23:20:50.6372 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 01027037-d623-4c54-71a7-08d92d2f8d56 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT005.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR12MB3139 Subject: [dpdk-stable] patch 'net/hns3: fix DCB configuration' has been queued to stable release 20.11.2 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi, FYI, your patch has been queued to stable release 20.11.2 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 06/14/21. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/steevenlee/dpdk This queued commit can be viewed at: https://github.com/steevenlee/dpdk/commit/0eafb399ba3a6bb5b016efdc27a1e56114f20893 Thanks. Xueming Li --- >From 0eafb399ba3a6bb5b016efdc27a1e56114f20893 Mon Sep 17 00:00:00 2001 From: Huisong Li Date: Sat, 15 May 2021 08:52:36 +0800 Subject: [PATCH] net/hns3: fix DCB configuration Cc: Luca Boccassi [ upstream commit 0b92fa1eb0648c489447853073d47e56b7717e74 ] Currently, the DCB configuration takes effect in the dev_start stage, and the mapping between TCs and queues are also updated in this stage. However, the DCB configuration is delivered in the dev_configure stage. If the configuration fails, it should be intercepted in this stage. If the configuration succeeds, the user should be able to obtain the corresponding updated information, such as the mapping between TCs and queues. So this patch moves DCB configuration to dev_configure. Fixes: 62e3ccc2b94c ("net/hns3: support flow control") Signed-off-by: Huisong Li Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_dcb.c | 34 ++++------------------- drivers/net/hns3/hns3_dcb.h | 2 +- drivers/net/hns3/hns3_ethdev.c | 51 ++++++++++++++++++++-------------- 3 files changed, 37 insertions(+), 50 deletions(-) diff --git a/drivers/net/hns3/hns3_dcb.c b/drivers/net/hns3/hns3_dcb.c index 69db900c93..15f5f05134 100644 --- a/drivers/net/hns3/hns3_dcb.c +++ b/drivers/net/hns3/hns3_dcb.c @@ -1573,7 +1573,7 @@ hns3_dcb_configure(struct hns3_adapter *hns) int ret; hns3_dcb_cfg_validate(hns, &num_tc, &map_changed); - if (map_changed || rte_atomic16_read(&hw->reset.resetting)) { + if (map_changed) { ret = hns3_dcb_info_update(hns, num_tc); if (ret) { hns3_err(hw, "dcb info update failed: %d", ret); @@ -1669,14 +1669,18 @@ hns3_dcb_init(struct hns3_hw *hw) return 0; } -static int +int hns3_update_queue_map_configure(struct hns3_adapter *hns) { struct hns3_hw *hw = &hns->hw; + enum rte_eth_rx_mq_mode mq_mode = hw->data->dev_conf.rxmode.mq_mode; uint16_t nb_rx_q = hw->data->nb_rx_queues; uint16_t nb_tx_q = hw->data->nb_tx_queues; int ret; + if ((uint32_t)mq_mode & ETH_MQ_RX_DCB_FLAG) + return 0; + ret = hns3_dcb_update_tc_queue_mapping(hw, nb_rx_q, nb_tx_q); if (ret) { hns3_err(hw, "failed to update tc queue mapping, ret = %d.", @@ -1690,32 +1694,6 @@ hns3_update_queue_map_configure(struct hns3_adapter *hns) return ret; } -int -hns3_dcb_cfg_update(struct hns3_adapter *hns) -{ - struct hns3_hw *hw = &hns->hw; - enum rte_eth_rx_mq_mode mq_mode = hw->data->dev_conf.rxmode.mq_mode; - int ret; - - if ((uint32_t)mq_mode & ETH_MQ_RX_DCB_FLAG) { - ret = hns3_dcb_configure(hns); - if (ret) - hns3_err(hw, "Failed to config dcb: %d", ret); - } else { - /* - * Update queue map without PFC configuration, - * due to queues reconfigured by user. - */ - ret = hns3_update_queue_map_configure(hns); - if (ret) - hns3_err(hw, - "Failed to update queue mapping configure: %d", - ret); - } - - return ret; -} - static void hns3_get_fc_mode(struct hns3_hw *hw, enum rte_eth_fc_mode mode) { diff --git a/drivers/net/hns3/hns3_dcb.h b/drivers/net/hns3/hns3_dcb.h index 49e5ba70a5..0d167e75dc 100644 --- a/drivers/net/hns3/hns3_dcb.h +++ b/drivers/net/hns3/hns3_dcb.h @@ -207,7 +207,7 @@ int hns3_dcb_pfc_enable(struct rte_eth_dev *dev, int hns3_queue_to_tc_mapping(struct hns3_hw *hw, uint16_t nb_rx_q, uint16_t nb_tx_q); -int hns3_dcb_cfg_update(struct hns3_adapter *hns); +int hns3_update_queue_map_configure(struct hns3_adapter *hns); int hns3_dcb_port_shaper_cfg(struct hns3_hw *hw); #endif /* _HNS3_DCB_H_ */ diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index 907fa43257..637e6134f9 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -2191,24 +2191,6 @@ hns3_check_mq_mode(struct rte_eth_dev *dev) return 0; } -static int -hns3_check_dcb_cfg(struct rte_eth_dev *dev) -{ - struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private); - - if (!hns3_dev_dcb_supported(hw)) { - hns3_err(hw, "this port does not support dcb configurations."); - return -EOPNOTSUPP; - } - - if (hw->current_fc_status == HNS3_FC_STATUS_MAC_PAUSE) { - hns3_err(hw, "MAC pause enabled, cannot config dcb info."); - return -EOPNOTSUPP; - } - - return 0; -} - static int hns3_bind_ring_with_vector(struct hns3_hw *hw, uint16_t vector_id, bool en, enum hns3_ring_type queue_type, uint16_t queue_id) @@ -2344,6 +2326,30 @@ hns3_refresh_mtu(struct rte_eth_dev *dev, struct rte_eth_conf *conf) return 0; } +static int +hns3_setup_dcb(struct rte_eth_dev *dev) +{ + struct hns3_adapter *hns = dev->data->dev_private; + struct hns3_hw *hw = &hns->hw; + int ret; + + if (!hns3_dev_dcb_supported(hw)) { + hns3_err(hw, "this port does not support dcb configurations."); + return -EOPNOTSUPP; + } + + if (hw->current_fc_status == HNS3_FC_STATUS_MAC_PAUSE) { + hns3_err(hw, "MAC pause enabled, cannot config dcb info."); + return -EOPNOTSUPP; + } + + ret = hns3_dcb_configure(hns); + if (ret) + hns3_err(hw, "failed to config dcb: %d", ret); + + return ret; +} + static int hns3_dev_configure(struct rte_eth_dev *dev) { @@ -2390,7 +2396,7 @@ hns3_dev_configure(struct rte_eth_dev *dev) goto cfg_err; if ((uint32_t)mq_mode & ETH_MQ_RX_DCB_FLAG) { - ret = hns3_check_dcb_cfg(dev); + ret = hns3_setup_dcb(dev); if (ret) goto cfg_err; } @@ -4870,9 +4876,12 @@ hns3_do_start(struct hns3_adapter *hns, bool reset_queue) struct hns3_hw *hw = &hns->hw; int ret; - ret = hns3_dcb_cfg_update(hns); - if (ret) + ret = hns3_update_queue_map_configure(hns); + if (ret) { + hns3_err(hw, "failed to update queue mapping configuration, ret = %d", + ret); return ret; + } ret = hns3_init_queues(hns, reset_queue); if (ret) { -- 2.25.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2021-06-12 06:54:00.847089400 +0800 +++ 0170-net-hns3-fix-DCB-configuration.patch 2021-06-12 06:53:56.670000000 +0800 @@ -1 +1 @@ -From 0b92fa1eb0648c489447853073d47e56b7717e74 Mon Sep 17 00:00:00 2001 +From 0eafb399ba3a6bb5b016efdc27a1e56114f20893 Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Luca Boccassi + +[ upstream commit 0b92fa1eb0648c489447853073d47e56b7717e74 ] @@ -16 +18,0 @@ -Cc: stable@dpdk.org @@ -21 +23 @@ - drivers/net/hns3/hns3_dcb.c | 35 ++++----------------- + drivers/net/hns3/hns3_dcb.c | 34 ++++------------------- @@ -23,2 +25,2 @@ - drivers/net/hns3/hns3_ethdev.c | 56 +++++++++++++++++++--------------- - 3 files changed, 38 insertions(+), 55 deletions(-) + drivers/net/hns3/hns3_ethdev.c | 51 ++++++++++++++++++++-------------- + 3 files changed, 37 insertions(+), 50 deletions(-) @@ -27 +29 @@ -index 8fcb284cf1..1cb6adb886 100644 +index 69db900c93..15f5f05134 100644 @@ -30 +32 @@ -@@ -1615,8 +1615,7 @@ hns3_dcb_configure(struct hns3_adapter *hns) +@@ -1573,7 +1573,7 @@ hns3_dcb_configure(struct hns3_adapter *hns) @@ -34,2 +36 @@ -- if (map_changed || -- __atomic_load_n(&hw->reset.resetting, __ATOMIC_RELAXED)) { +- if (map_changed || rte_atomic16_read(&hw->reset.resetting)) { @@ -40 +41 @@ -@@ -1712,14 +1711,18 @@ hns3_dcb_init(struct hns3_hw *hw) +@@ -1669,14 +1669,18 @@ hns3_dcb_init(struct hns3_hw *hw) @@ -60 +61 @@ -@@ -1733,32 +1736,6 @@ hns3_update_queue_map_configure(struct hns3_adapter *hns) +@@ -1690,32 +1694,6 @@ hns3_update_queue_map_configure(struct hns3_adapter *hns) @@ -94 +95 @@ -index cd8d0b7bc8..f378bd46c6 100644 +index 49e5ba70a5..0d167e75dc 100644 @@ -103,3 +104,3 @@ - int hns3_port_shaper_update(struct hns3_hw *hw, uint32_t speed); - int hns3_pg_shaper_rate_cfg(struct hns3_hw *hw, uint8_t pg_id, uint32_t rate); - int hns3_pri_shaper_rate_cfg(struct hns3_hw *hw, uint8_t tc_no, uint32_t rate); + int hns3_dcb_port_shaper_cfg(struct hns3_hw *hw); + + #endif /* _HNS3_DCB_H_ */ @@ -107 +108 @@ -index f49f220062..20491305e7 100644 +index 907fa43257..637e6134f9 100644 @@ -110 +111 @@ -@@ -2273,24 +2273,6 @@ hns3_check_mq_mode(struct rte_eth_dev *dev) +@@ -2191,24 +2191,6 @@ hns3_check_mq_mode(struct rte_eth_dev *dev) @@ -135 +136 @@ -@@ -2426,6 +2408,30 @@ hns3_refresh_mtu(struct rte_eth_dev *dev, struct rte_eth_conf *conf) +@@ -2344,6 +2326,30 @@ hns3_refresh_mtu(struct rte_eth_dev *dev, struct rte_eth_conf *conf) @@ -164 +165 @@ - hns3_check_link_speed(struct hns3_hw *hw, uint32_t link_speeds) + hns3_dev_configure(struct rte_eth_dev *dev) @@ -166 +167 @@ -@@ -2506,7 +2512,7 @@ hns3_dev_configure(struct rte_eth_dev *dev) +@@ -2390,7 +2396,7 @@ hns3_dev_configure(struct rte_eth_dev *dev) @@ -175 +176 @@ -@@ -5574,14 +5580,14 @@ hns3_do_start(struct hns3_adapter *hns, bool reset_queue) +@@ -4870,9 +4876,12 @@ hns3_do_start(struct hns3_adapter *hns, bool reset_queue) @@ -188,6 +189 @@ -- /* -- * The hns3_dcb_cfg_update may configure TM module, so -- * hns3_tm_conf_update must called later. -- */ -+ /* Note: hns3_tm_conf_update must be called after configuring DCB. */ - ret = hns3_tm_conf_update(hw); + ret = hns3_init_queues(hns, reset_queue); @@ -195 +190,0 @@ - PMD_INIT_LOG(ERR, "failed to update tm conf, ret = %d.", ret);