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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by DM6NAM11FT053.mail.protection.outlook.com (10.13.173.74) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4690.15 via Frontend Transport; Wed, 10 Nov 2021 06:33:19 +0000 Received: from nvidia.com (172.20.187.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 10 Nov 2021 06:33:16 +0000 From: Xueming Li To: Jiawen Wu CC: Luca Boccassi , dpdk stable Date: Wed, 10 Nov 2021 14:28:11 +0800 Message-ID: <20211110063216.2744012-8-xuemingl@nvidia.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211110063216.2744012-1-xuemingl@nvidia.com> References: <20211110063216.2744012-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 9194a384-fdf6-44cd-7875-08d9a413fc3d X-MS-TrafficTypeDiagnostic: BYAPR12MB3174: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:9508; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(36840700001)(46966006)(1076003)(36860700001)(7696005)(53546011)(4001150100001)(7636003)(55016002)(47076005)(6916009)(426003)(6286002)(83380400001)(508600001)(8936002)(36756003)(6666004)(86362001)(356005)(336012)(2616005)(8676002)(2906002)(70586007)(70206006)(4326008)(966005)(26005)(54906003)(316002)(82310400003)(16526019)(186003)(5660300002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Nov 2021 06:33:19.1807 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9194a384-fdf6-44cd-7875-08d9a413fc3d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT053.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB3174 Subject: [dpdk-stable] patch 'net/txgbe: fix reading SFP module SFF-8472 data' has been queued to stable release 20.11.4 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi, FYI, your patch has been queued to stable release 20.11.4 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 11/12/21. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/steevenlee/dpdk This queued commit can be viewed at: https://github.com/steevenlee/dpdk/commit/05af857e4305c4d5533c44c458b92f15e9af4281 Thanks. Xueming Li --- >From 05af857e4305c4d5533c44c458b92f15e9af4281 Mon Sep 17 00:00:00 2001 From: Jiawen Wu Date: Thu, 12 Aug 2021 10:00:19 +0800 Subject: [PATCH] net/txgbe: fix reading SFP module SFF-8472 data Cc: Xueming Li [ upstream commit 00970f6398c871df52cfe3b87ebbe418616c9117 ] Fix the I2C target address selection to read SFP module's SFF-8472 data. Fixes: 8f09fb4642fa ("net/txgbe: add module identify") Signed-off-by: Jiawen Wu --- drivers/net/txgbe/base/txgbe_phy.c | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/drivers/net/txgbe/base/txgbe_phy.c b/drivers/net/txgbe/base/txgbe_phy.c index bdd6bf780e..aa8037a36e 100644 --- a/drivers/net/txgbe/base/txgbe_phy.c +++ b/drivers/net/txgbe/base/txgbe_phy.c @@ -7,7 +7,7 @@ #include "txgbe_mng.h" #include "txgbe_phy.h" -static void txgbe_i2c_start(struct txgbe_hw *hw); +static void txgbe_i2c_start(struct txgbe_hw *hw, u8 dev_addr); static void txgbe_i2c_stop(struct txgbe_hw *hw); /** @@ -1223,11 +1223,9 @@ s32 txgbe_write_i2c_eeprom(struct txgbe_hw *hw, u8 byte_offset, s32 txgbe_read_i2c_byte_unlocked(struct txgbe_hw *hw, u8 byte_offset, u8 dev_addr, u8 *data) { - UNREFERENCED_PARAMETER(dev_addr); - DEBUGFUNC("txgbe_read_i2c_byte"); - txgbe_i2c_start(hw); + txgbe_i2c_start(hw, dev_addr); /* wait tx empty */ if (!po32m(hw, TXGBE_I2CICR, TXGBE_I2CICR_TXEMPTY, @@ -1289,11 +1287,9 @@ s32 txgbe_read_i2c_byte(struct txgbe_hw *hw, u8 byte_offset, s32 txgbe_write_i2c_byte_unlocked(struct txgbe_hw *hw, u8 byte_offset, u8 dev_addr, u8 data) { - UNREFERENCED_PARAMETER(dev_addr); - DEBUGFUNC("txgbe_write_i2c_byte"); - txgbe_i2c_start(hw); + txgbe_i2c_start(hw, dev_addr); /* wait tx empty */ if (!po32m(hw, TXGBE_I2CICR, TXGBE_I2CICR_TXEMPTY, @@ -1344,7 +1340,7 @@ s32 txgbe_write_i2c_byte(struct txgbe_hw *hw, u8 byte_offset, * * Sets I2C start condition (High -> Low on SDA while SCL is High) **/ -static void txgbe_i2c_start(struct txgbe_hw *hw) +static void txgbe_i2c_start(struct txgbe_hw *hw, u8 dev_addr) { DEBUGFUNC("txgbe_i2c_start"); @@ -1355,9 +1351,9 @@ static void txgbe_i2c_start(struct txgbe_hw *hw) TXGBE_I2CCON_SPEED(1) | TXGBE_I2CCON_RESTART | TXGBE_I2CCON_SDIA)); - wr32(hw, TXGBE_I2CTAR, TXGBE_I2C_SLAVEADDR); - wr32(hw, TXGBE_I2CSSSCLHCNT, 600); - wr32(hw, TXGBE_I2CSSSCLLCNT, 600); + wr32(hw, TXGBE_I2CTAR, dev_addr >> 1); + wr32(hw, TXGBE_I2CSSSCLHCNT, 200); + wr32(hw, TXGBE_I2CSSSCLLCNT, 200); wr32(hw, TXGBE_I2CRXTL, 0); /* 1byte for rx full signal */ wr32(hw, TXGBE_I2CTXTL, 4); wr32(hw, TXGBE_I2CSCLTMOUT, 0xFFFFFF); -- 2.33.0 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2021-11-10 14:17:02.444702146 +0800 +++ 0007-net-txgbe-fix-reading-SFP-module-SFF-8472-data.patch 2021-11-10 14:17:01.740747155 +0800 @@ -1 +1 @@ -From 00970f6398c871df52cfe3b87ebbe418616c9117 Mon Sep 17 00:00:00 2001 +From 05af857e4305c4d5533c44c458b92f15e9af4281 Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Xueming Li + +[ upstream commit 00970f6398c871df52cfe3b87ebbe418616c9117 ] @@ -9 +11,0 @@ -Cc: stable@dpdk.org @@ -17 +19 @@ -index 3e9f507212..2db87ae0c5 100644 +index bdd6bf780e..aa8037a36e 100644 @@ -20 +22 @@ -@@ -8,7 +8,7 @@ +@@ -7,7 +7,7 @@ @@ -27,3 +29,3 @@ - static s32 txgbe_handle_bp_flow(u32 link_mode, struct txgbe_hw *hw); - static void txgbe_get_bp_ability(struct txgbe_backplane_ability *ability, -@@ -1248,11 +1248,9 @@ s32 txgbe_write_i2c_eeprom(struct txgbe_hw *hw, u8 byte_offset, + + /** +@@ -1223,11 +1223,9 @@ s32 txgbe_write_i2c_eeprom(struct txgbe_hw *hw, u8 byte_offset, @@ -42 +44 @@ -@@ -1314,11 +1312,9 @@ s32 txgbe_read_i2c_byte(struct txgbe_hw *hw, u8 byte_offset, +@@ -1289,11 +1287,9 @@ s32 txgbe_read_i2c_byte(struct txgbe_hw *hw, u8 byte_offset, @@ -55 +57 @@ -@@ -1369,7 +1365,7 @@ s32 txgbe_write_i2c_byte(struct txgbe_hw *hw, u8 byte_offset, +@@ -1344,7 +1340,7 @@ s32 txgbe_write_i2c_byte(struct txgbe_hw *hw, u8 byte_offset, @@ -64 +66 @@ -@@ -1380,9 +1376,9 @@ static void txgbe_i2c_start(struct txgbe_hw *hw) +@@ -1355,9 +1351,9 @@ static void txgbe_i2c_start(struct txgbe_hw *hw)