From: Hernan Vargas <hernan.vargas@intel.com>
To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com,
maxime.coquelin@redhat.com
Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com,
Hernan Vargas <hernan.vargas@intel.com>,
stable@dpdk.org
Subject: [PATCH v3 02/30] baseband/acc100: add function to check AQ availability
Date: Tue, 11 Oct 2022 19:53:18 -0700 [thread overview]
Message-ID: <20221012025346.204394-3-hernan.vargas@intel.com> (raw)
In-Reply-To: <20221012025346.204394-1-hernan.vargas@intel.com>
It is possible for some corner case to run more batch enqueue than
supported. A protection is required to avoid that corner case.
Enhance all ACC100 enqueue operations with check to see if there is room
in the atomic queue for enqueueing batches into the queue manager
Check room in AQ for the enqueues batches into Qmgr
Fixes: 5ad5060f8f7 ("baseband/acc100: add LDPC processing functions")
Cc: stable@dpdk.org
Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
drivers/baseband/acc/rte_acc100_pmd.c | 30 ++++++++++++++++++++-------
1 file changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
index 733766ad3e..b436bd9078 100644
--- a/drivers/baseband/acc/rte_acc100_pmd.c
+++ b/drivers/baseband/acc/rte_acc100_pmd.c
@@ -2995,12 +2995,27 @@ acc100_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data,
return i;
}
+/* Check room in AQ for the enqueues batches into Qmgr */
+static int32_t
+acc100_aq_avail(struct rte_bbdev_queue_data *q_data, uint16_t num_ops)
+{
+ struct acc_queue *q = q_data->queue_private;
+ int32_t aq_avail = q->aq_depth -
+ ((q->aq_enqueued - q->aq_dequeued + ACC_MAX_QUEUE_DEPTH)
+ % ACC_MAX_QUEUE_DEPTH) - (num_ops >> 7);
+ if (aq_avail <= 0)
+ acc_enqueue_queue_full(q_data);
+
+ return aq_avail;
+}
+
/* Enqueue encode operations for ACC100 device. */
static uint16_t
acc100_enqueue_enc(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
- if (unlikely(num == 0))
+ int32_t aq_avail = acc100_aq_avail(q_data, num);
+ if (unlikely((aq_avail <= 0) || (num == 0)))
return 0;
if (ops[0]->turbo_enc.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
return acc100_enqueue_enc_tb(q_data, ops, num);
@@ -3013,7 +3028,8 @@ static uint16_t
acc100_enqueue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
- if (unlikely(num == 0))
+ int32_t aq_avail = acc100_aq_avail(q_data, num);
+ if (unlikely((aq_avail <= 0) || (num == 0)))
return 0;
if (ops[0]->ldpc_enc.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
return acc100_enqueue_enc_tb(q_data, ops, num);
@@ -3183,7 +3199,8 @@ static uint16_t
acc100_enqueue_dec(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
- if (unlikely(num == 0))
+ int32_t aq_avail = acc100_aq_avail(q_data, num);
+ if (unlikely((aq_avail <= 0) || (num == 0)))
return 0;
if (ops[0]->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
return acc100_enqueue_dec_tb(q_data, ops, num);
@@ -3196,11 +3213,8 @@ static uint16_t
acc100_enqueue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
- struct acc_queue *q = q_data->queue_private;
- int32_t aq_avail = q->aq_depth +
- (q->aq_dequeued - q->aq_enqueued) / 128;
-
- if (unlikely((aq_avail == 0) || (num == 0)))
+ int32_t aq_avail = acc100_aq_avail(q_data, num);
+ if (unlikely((aq_avail <= 0) || (num == 0)))
return 0;
if (ops[0]->ldpc_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
--
2.37.1
next prev parent reply other threads:[~2022-10-11 18:57 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20221012025346.204394-1-hernan.vargas@intel.com>
2022-10-12 2:53 ` [PATCH v3 01/30] baseband/acc100: fix ring availability calculation Hernan Vargas
2022-10-14 9:18 ` Maxime Coquelin
2022-10-12 2:53 ` Hernan Vargas [this message]
2022-10-14 9:25 ` [PATCH v3 02/30] baseband/acc100: add function to check AQ availability Maxime Coquelin
2022-10-12 2:53 ` [PATCH v3 03/30] baseband/acc100: memory leak fix Hernan Vargas
2022-10-14 9:29 ` Maxime Coquelin
2022-10-12 2:53 ` [PATCH v3 04/30] baseband/acc100: add LDPC encoder padding function Hernan Vargas
2022-10-14 9:33 ` Maxime Coquelin
2022-10-12 2:53 ` [PATCH v3 05/30] baseband/acc100: check turbo dec/enc input Hernan Vargas
2022-10-14 9:35 ` Maxime Coquelin
2022-10-12 2:53 ` [PATCH v3 06/30] baseband/acc100: check for unlikely operation vals Hernan Vargas
2022-10-14 9:39 ` Maxime Coquelin
2022-10-12 2:53 ` [PATCH v3 07/30] baseband/acc100: enforce additional check on FCW Hernan Vargas
2022-10-14 9:48 ` Maxime Coquelin
2022-10-12 2:53 ` [PATCH v3 08/30] baseband/acc100: allocate ring/queue mem when NULL Hernan Vargas
2022-10-14 9:55 ` Maxime Coquelin
2022-10-12 2:53 ` [PATCH v3 09/30] baseband/acc100: reduce input length for CRC24B Hernan Vargas
2022-10-14 9:56 ` Maxime Coquelin
2022-10-12 2:53 ` [PATCH v3 10/30] baseband/acc100: fix clearing PF IR outside handler Hernan Vargas
2022-10-14 9:56 ` Maxime Coquelin
2022-10-12 2:53 ` [PATCH v3 11/30] baseband/acc100: set device min alignment to 1 Hernan Vargas
2022-10-14 10:02 ` Maxime Coquelin
2022-10-12 2:53 ` [PATCH v3 12/30] baseband/acc100: add protection for NULL HARQ input Hernan Vargas
2022-10-14 10:03 ` Maxime Coquelin
2022-10-12 2:53 ` [PATCH v3 13/30] baseband/acc100: reset pointer after rte_free Hernan Vargas
2022-10-14 10:03 ` Maxime Coquelin
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