From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A6EC1A0542 for ; Thu, 27 Oct 2022 01:09:16 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8515B40E50; Thu, 27 Oct 2022 01:09:16 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mails.dpdk.org (Postfix) with ESMTP id A677840A7E for ; Thu, 27 Oct 2022 01:09:14 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666825754; x=1698361754; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=k1j1iLaW2A49QiOzvLh9+YDal2Lqy7eA4jewIytVj3A=; b=GDzp2nhSBFQBBla/U/RjamWFOWFZ1ykT4uIU7axC/2wZipbYjr2lS5hY rkONCGIM3FgTq0Fn3bG+lrFt+f3sBat1VpsMobKtEa4/c9ZHxi6i2rqWW DYcGKMoHiUA5YPAKiluaN5hwuCOOUUrXmCPS9h5k0wRuQsP41Gc9XeYT5 giB8+DIYoKNmOEhvlAENZha/Dt1m+E9cWTe59sWoFi5WeQTfaXr4qqK0w rYRUmv0SMp79U9uazaOreibLDec1TpfhSOdGHoJLdIEM+W2wtfG7/hWzY xnLJWuoeaceYC13IRa+jo6knOF0CvfKYFIfj2pCii5/gAA6uZuyussvQZ A==; X-IronPort-AV: E=McAfee;i="6500,9779,10512"; a="305696108" X-IronPort-AV: E=Sophos;i="5.95,215,1661842800"; d="scan'208";a="305696108" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Oct 2022 16:09:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10512"; a="626967287" X-IronPort-AV: E=Sophos;i="5.95,215,1661842800"; d="scan'208";a="626967287" Received: from txanpdk02.an.intel.com ([10.123.117.76]) by orsmga007.jf.intel.com with ESMTP; 26 Oct 2022 16:09:13 -0700 From: Abdullah Sevincer To: stable@dpdk.org Cc: ktraynor@redhat.com, Abdullah Sevincer Subject: [PATCH 21.11 v1] event/dlb2: handle enqueuing more than maximum depth Date: Wed, 26 Oct 2022 18:09:10 -0500 Message-Id: <20221026230910.668568-1-abdullah.sevincer@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org [ upstream commit 9c9e72326bd28cd456509d60bcbe38a15a0bb7d0 ] This patch addresses an issue of enqueuing more than max_enq_depth and not able to dequeuing events equal to max_cq_depth in a single call of rte_event_enqueue_burst and rte_event_dequeue_burst. Apply fix for restricting enqueue of events to max_enq_depth so that in a single rte_event_enqueue_burst() call at most max_enq_depth events are enqueued. Also set per port and domain history list sizes based on cq_depth. This results in dequeuing correct number of events as set by max_cq_depth. Fixes: f3cad285bb88 ("event/dlb2: add infos get and configure") Signed-off-by: Abdullah Sevincer --- drivers/event/dlb2/dlb2.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c index 543f793ed1..2e0f617b9c 100644 --- a/drivers/event/dlb2/dlb2.c +++ b/drivers/event/dlb2/dlb2.c @@ -627,7 +627,7 @@ dlb2_hw_create_sched_domain(struct dlb2_hw_dev *handle, cfg->num_ldb_queues; cfg->num_hist_list_entries = resources_asked->num_ldb_ports * - DLB2_NUM_HIST_LIST_ENTRIES_PER_LDB_PORT; + evdev_dlb2_default_info.max_event_port_dequeue_depth; if (device_version == DLB2_HW_V2_5) { DLB2_LOG_DBG("sched domain create - ldb_qs=%d, ldb_ports=%d, dir_ports=%d, atomic_inflights=%d, hist_list_entries=%d, credits=%d\n", @@ -1350,7 +1350,7 @@ dlb2_hw_create_ldb_port(struct dlb2_eventdev *dlb2, cfg.cq_depth = rte_align32pow2(dequeue_depth); cfg.cq_depth_threshold = 1; - cfg.cq_history_list_size = DLB2_NUM_HIST_LIST_ENTRIES_PER_LDB_PORT; + cfg.cq_history_list_size = cfg.cq_depth; if (handle->cos_id == DLB2_COS_DEFAULT) cfg.cos_id = 0; @@ -2937,6 +2937,7 @@ __dlb2_event_enqueue_burst(void *event_port, struct dlb2_eventdev_port *ev_port = event_port; struct dlb2_port *qm_port = &ev_port->qm_port; struct process_local_port_data *port_data; + int num_tx; int i; RTE_ASSERT(ev_port->enq_configured); @@ -2946,7 +2947,8 @@ __dlb2_event_enqueue_burst(void *event_port, port_data = &dlb2_port[qm_port->id][PORT_TYPE(qm_port)]; - while (i < num) { + num_tx = RTE_MIN(num, ev_port->conf.enqueue_depth); + while (i < num_tx) { uint8_t sched_types[DLB2_NUM_QES_PER_CACHE_LINE]; uint8_t queue_ids[DLB2_NUM_QES_PER_CACHE_LINE]; int pop_offs = 0; -- 2.25.1