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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by DM6NAM11FT018.mail.protection.outlook.com (10.13.172.110) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5769.14 via Frontend Transport; Mon, 31 Oct 2022 18:25:29 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.26; Mon, 31 Oct 2022 11:25:18 -0700 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Mon, 31 Oct 2022 11:25:15 -0700 From: Bing Zhao To: , , CC: , , , Subject: [PATCH] net/mlx5: fix the building with flexible array Date: Mon, 31 Oct 2022 20:24:56 +0200 Message-ID: <20221031182456.432384-1-bingz@nvidia.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT018:EE_|SA1PR12MB7443:EE_ X-MS-Office365-Filtering-Correlation-Id: 27c1f9cc-6dc7-45a0-f0a3-08dabb6d4a1c X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Oct 2022 18:25:29.4024 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 27c1f9cc-6dc7-45a0-f0a3-08dabb6d4a1c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT018.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7443 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org With some higher GCC/CLANG version, it is not recommended to use a structure with a tailing flexible array inside another structure. Accessing this array may be considered as a risk to corrupt the following field even if it is by intention. The error below was observed: drivers/net/mlx5/linux/mlx5_ethdev_os.c: In function 'mlx5_get_flag_dropless_rq': drivers/net/mlx5/linux/mlx5_ethdev_os.c:1679:42: error: invalid use of structure with flexible array member [-Werror=pedantic] 1679 | struct ethtool_sset_info hdr; | ^~~ Changing it to memory dynamic allocation method will help to get rid of this complain. Fixes: e848218741ea ("net/mlx5: check delay drop settings in kernel driver") Cc: stable@dpdk.org Signed-off-by: Bing Zhao --- drivers/net/mlx5/linux/mlx5_ethdev_os.c | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/drivers/net/mlx5/linux/mlx5_ethdev_os.c b/drivers/net/mlx5/linux/mlx5_ethdev_os.c index 661d362dc0..d8bb03b875 100644 --- a/drivers/net/mlx5/linux/mlx5_ethdev_os.c +++ b/drivers/net/mlx5/linux/mlx5_ethdev_os.c @@ -1675,10 +1675,7 @@ mlx5_get_mac(struct rte_eth_dev *dev, uint8_t (*mac)[RTE_ETHER_ADDR_LEN]) */ int mlx5_get_flag_dropless_rq(struct rte_eth_dev *dev) { - struct { - struct ethtool_sset_info hdr; - uint32_t buf[1]; - } sset_info; + struct ethtool_sset_info *sset_info = NULL; struct ethtool_drvinfo drvinfo; struct ifreq ifr; struct ethtool_gstrings *strings = NULL; @@ -1689,15 +1686,21 @@ int mlx5_get_flag_dropless_rq(struct rte_eth_dev *dev) int32_t i; int ret; - sset_info.hdr.cmd = ETHTOOL_GSSET_INFO; - sset_info.hdr.reserved = 0; - sset_info.hdr.sset_mask = 1ULL << ETH_SS_PRIV_FLAGS; + sset_info = mlx5_malloc(0, sizeof(struct ethtool_sset_info) + + sizeof(uint32_t), 0, SOCKET_ID_ANY); + if (sset_info == NULL) { + rte_errno = ENOMEM; + return -rte_errno; + } + sset_info->cmd = ETHTOOL_GSSET_INFO; + sset_info->reserved = 0; + sset_info->sset_mask = 1ULL << ETH_SS_PRIV_FLAGS; ifr.ifr_data = (caddr_t)&sset_info; ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); if (!ret) { - const uint32_t *sset_lengths = sset_info.hdr.data; + const uint32_t *sset_lengths = sset_info->data; - len = sset_info.hdr.sset_mask ? sset_lengths[0] : 0; + len = sset_info->sset_mask ? sset_lengths[0] : 0; } else if (ret == -EOPNOTSUPP) { drvinfo.cmd = ETHTOOL_GDRVINFO; ifr.ifr_data = (caddr_t)&drvinfo; @@ -1770,5 +1773,6 @@ int mlx5_get_flag_dropless_rq(struct rte_eth_dev *dev) ret = !!(flags.data & (1U << i)); exit: mlx5_free(strings); + mlx5_free(sset_info); return ret; } -- 2.21.0