From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BED6EA054D for ; Wed, 16 Nov 2022 21:53:14 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5E9F4410D7; Wed, 16 Nov 2022 21:53:14 +0100 (CET) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mails.dpdk.org (Postfix) with ESMTP id 2F71040DFB for ; Wed, 16 Nov 2022 21:53:12 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668631993; x=1700167993; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=f79iJUncTn0TzG+LMQcT36+maux35SVISkEvZWz1eEc=; b=KW6lVBuFSCgfFXbgX82iqGtv4sc1Id+rcMPgT9MdwzT6PFqWKkU2wSbY TV15n+6ixRJUbzZWzL0HK2Wnufjk6hePQm4gfpJFKz/ZuQSl7J49ycvbu GuaCVdKGJptd2iJ0nbZCH+PVvqYgdb8lcw0vHtM4kCaK4SdxuG3fXCf+c 9qit/pEfzA+8gH1PDISTC8fkMUOaTjrseEJ+MeNfrSqNotM1WKmBPFMv2 0uReXMfJmrhCNmJ1jyUfofrH67SkMvbAt9iGRIfxUF3kyRo+Z6QEyCQAx ZxhDj3NttbIr5BO5rF8WUQiuOX8MIywLoCrDFlD+wL6cy/fxOY6xpzUnp A==; X-IronPort-AV: E=McAfee;i="6500,9779,10533"; a="398946775" X-IronPort-AV: E=Sophos;i="5.96,169,1665471600"; d="scan'208";a="398946775" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Nov 2022 12:51:43 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10533"; a="590334497" X-IronPort-AV: E=Sophos;i="5.96,169,1665471600"; d="scan'208";a="590334497" Received: from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103]) by orsmga003.jf.intel.com with ESMTP; 16 Nov 2022 12:51:42 -0800 From: Hernan Vargas To: stable@dpdk.org, ktraynor@redhat.com Cc: nicolas.chautru@intel.com, Hernan Vargas , Maxime Coquelin Subject: [PATCH 21.11 1/7] baseband/acc100: add LDPC encoder padding function Date: Wed, 16 Nov 2022 20:46:46 -0800 Message-Id: <20221117044652.163000-2-hernan.vargas@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20221117044652.163000-1-hernan.vargas@intel.com> References: <20221117044652.163000-1-hernan.vargas@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org [ upstream commit 6f3325bbfa556e8fe39df15f32424f40b2eb1d05 ] LDPC Encoder input may need to be padded to avoid small beat for ACC100. Padding 5GDL input buffer length (BLEN) to avoid case (BLEN % 64) <= 8. Adding protection for corner case to avoid for 5GDL occurrence of last beat within the ACC100 fabric with <= 8B which might trigger a fabric corner case hang issue. Fixes: 5ad5060f8f7 ("baseband/acc100: add LDPC processing functions") Signed-off-by: Hernan Vargas Reviewed-by: Maxime Coquelin --- drivers/baseband/acc100/rte_acc100_pmd.c | 63 ++++++++++++++++-------- 1 file changed, 43 insertions(+), 20 deletions(-) diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c index b59548315f..254f256c80 100644 --- a/drivers/baseband/acc100/rte_acc100_pmd.c +++ b/drivers/baseband/acc100/rte_acc100_pmd.c @@ -1438,6 +1438,8 @@ acc100_fcw_ld_fill(const struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw, * Store information about device capabilities * @param next_triplet * Index for ACC100 DMA Descriptor triplet + * @param scattergather + * Flag to support scatter-gather for the mbuf * * @return * Returns index of next triplet on success, other value if lengths of @@ -1447,12 +1449,16 @@ acc100_fcw_ld_fill(const struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw, static inline int acc100_dma_fill_blk_type_in(struct acc100_dma_req_desc *desc, struct rte_mbuf **input, uint32_t *offset, uint32_t cb_len, - uint32_t *seg_total_left, int next_triplet) + uint32_t *seg_total_left, int next_triplet, + bool scattergather) { uint32_t part_len; struct rte_mbuf *m = *input; - part_len = (*seg_total_left < cb_len) ? *seg_total_left : cb_len; + if (scattergather) + part_len = (*seg_total_left < cb_len) ? *seg_total_left : cb_len; + else + part_len = cb_len; cb_len -= part_len; *seg_total_left -= part_len; @@ -1588,7 +1594,9 @@ acc100_dma_desc_te_fill(struct rte_bbdev_enc_op *op, } next_triplet = acc100_dma_fill_blk_type_in(desc, input, in_offset, - length, seg_total_left, next_triplet); + length, seg_total_left, next_triplet, + check_bit(op->turbo_enc.op_flags, + RTE_BBDEV_TURBO_ENC_SCATTER_GATHER)); if (unlikely(next_triplet < 0)) { rte_bbdev_log(ERR, "Mismatch between data to process and mbuf data length in bbdev_op: %p", @@ -1624,6 +1632,19 @@ acc100_dma_desc_te_fill(struct rte_bbdev_enc_op *op, return 0; } +/* May need to pad LDPC Encoder input to avoid small beat for ACC100. */ +static inline uint16_t +pad_le_in(uint16_t blen) +{ + uint16_t last_beat; + + last_beat = blen % 64; + if ((last_beat > 0) && (last_beat <= 8)) + blen += 8; + + return blen; +} + static inline int acc100_dma_desc_le_fill(struct rte_bbdev_enc_op *op, struct acc100_dma_req_desc *desc, struct rte_mbuf **input, @@ -1652,8 +1673,7 @@ acc100_dma_desc_le_fill(struct rte_bbdev_enc_op *op, } next_triplet = acc100_dma_fill_blk_type_in(desc, input, in_offset, - in_length_in_bytes, - seg_total_left, next_triplet); + pad_le_in(in_length_in_bytes), seg_total_left, next_triplet, false); if (unlikely(next_triplet < 0)) { rte_bbdev_log(ERR, "Mismatch between data to process and mbuf data length in bbdev_op: %p", @@ -1741,7 +1761,9 @@ acc100_dma_desc_td_fill(struct rte_bbdev_dec_op *op, } next_triplet = acc100_dma_fill_blk_type_in(desc, input, in_offset, kw, - seg_total_left, next_triplet); + seg_total_left, next_triplet, + check_bit(op->turbo_dec.op_flags, + RTE_BBDEV_TURBO_DEC_SCATTER_GATHER)); if (unlikely(next_triplet < 0)) { rte_bbdev_log(ERR, "Mismatch between data to process and mbuf data length in bbdev_op: %p", @@ -1843,7 +1865,9 @@ acc100_dma_desc_ld_fill(struct rte_bbdev_dec_op *op, next_triplet = acc100_dma_fill_blk_type_in(desc, input, in_offset, input_length, - seg_total_left, next_triplet); + seg_total_left, next_triplet, + check_bit(op->ldpc_dec.op_flags, + RTE_BBDEV_LDPC_DEC_SCATTER_GATHER)); if (unlikely(next_triplet < 0)) { rte_bbdev_log(ERR, @@ -2378,7 +2402,7 @@ enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops, acc100_header_init(&desc->req); desc->req.numCBs = num; - in_length_in_bytes = ops[0]->ldpc_enc.input.data->data_len; + in_length_in_bytes = pad_le_in(ops[0]->ldpc_enc.input.data->data_len); out_length = (enc->cb_params.e + 7) >> 3; desc->req.m2dlen = 1 + num; desc->req.d2mlen = num; @@ -2988,10 +3012,9 @@ enqueue_ldpc_dec_one_op_cb(struct acc100_queue *q, struct rte_bbdev_dec_op *op, fcw = &desc->req.fcw_ld; acc100_fcw_ld_fill(op, fcw, harq_layout); - /* Special handling when overusing mbuf */ - if (fcw->rm_e < ACC100_MAX_E_MBUF) - seg_total_left = rte_pktmbuf_data_len(input) - - in_offset; + /* Special handling when using mbuf or not */ + if (check_bit(op->ldpc_dec.op_flags, RTE_BBDEV_LDPC_DEC_SCATTER_GATHER)) + seg_total_left = rte_pktmbuf_data_len(input) - in_offset; else seg_total_left = fcw->rm_e; @@ -3066,7 +3089,10 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op, while (mbuf_total_left > 0 && r < c) { - seg_total_left = rte_pktmbuf_data_len(input) - in_offset; + if (check_bit(op->ldpc_dec.op_flags, RTE_BBDEV_LDPC_DEC_SCATTER_GATHER)) + seg_total_left = rte_pktmbuf_data_len(input) - in_offset; + else + seg_total_left = op->ldpc_dec.input.length; /* Set up DMA descriptor */ desc = q->ring_addr + ((q->sw_ring_head + total_enqueued_cbs) @@ -3093,7 +3119,9 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op, rte_memdump(stderr, "Req Desc.", desc, sizeof(*desc)); #endif - if (seg_total_left == 0) { + if (check_bit(op->ldpc_dec.op_flags, + RTE_BBDEV_LDPC_DEC_SCATTER_GATHER) + && (seg_total_left == 0)) { /* Go to the next mbuf */ input = input->next; in_offset = 0; @@ -3694,8 +3722,6 @@ dequeue_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op, /* Clearing status, it will be set based on response */ op->status = 0; - op->status |= ((rsp.input_err) - ? (1 << RTE_BBDEV_DATA_ERROR) : 0); op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0); op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0); @@ -3766,8 +3792,6 @@ dequeue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op, rte_bbdev_log_debug("Resp. desc %p: %x", desc, rsp.val); - op->status |= ((rsp.input_err) - ? (1 << RTE_BBDEV_DATA_ERROR) : 0); op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0); op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0); @@ -3947,8 +3971,7 @@ dequeue_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op **ref_op, rte_bbdev_log_debug("Resp. desc %p: %x", desc, rsp.val); - op->status |= ((rsp.input_err) - ? (1 << RTE_BBDEV_DATA_ERROR) : 0); + op->status |= ((rsp.input_err) ? (1 << RTE_BBDEV_DATA_ERROR) : 0); op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0); op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0); -- 2.37.1