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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Nov 2022 14:39:30.1809 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 085a971b-d362-4e6a-aec3-08dac8a98935 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT055.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB7619 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Maximal LRO message size must be multiply of 256. Otherwise, TCP payload may not fit into a single WQE. Cc: stable@dpdk.org Signed-off-by: Gregory Etelson Acked-by: Matan Azrad --- doc/guides/nics/mlx5.rst | 3 +++ 1 file changed, 3 insertions(+) diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index 4f0db21dde..98e0b24be4 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -278,6 +278,9 @@ Limitations - No Tx metadata go to the E-Switch steering domain for the Flow group 0. The flows within group 0 and set metadata action are rejected by hardware. +- The driver rounds down the ``max_lro_pkt_size`` value in the port + configuration to a multiple of 256 due to HW limitation. + .. note:: MAC addresses not already present in the bridge table of the associated -- 2.34.1