From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C024E41D4F for ; Thu, 23 Feb 2023 10:39:15 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B76C843150; Thu, 23 Feb 2023 10:39:15 +0100 (CET) Received: from mail-wr1-f50.google.com (mail-wr1-f50.google.com [209.85.221.50]) by mails.dpdk.org (Postfix) with ESMTP id 97F6F43150 for ; Thu, 23 Feb 2023 10:39:13 +0100 (CET) Received: by mail-wr1-f50.google.com with SMTP id c12so10138350wrw.1 for ; Thu, 23 Feb 2023 01:39:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QarhyAtQeGGy6eRVMrqcKH6hOi/hZt1L7OINUTYHcHE=; b=d9ycKe9bX46IydbcUXHIDDTOgxPv7asWYOIjXD0l1QkAEG77FlZJHSAKQEEBKh0oY6 WBm1E0mo/tiKkObV/P3gjJ80bZrXi4N+7WJN9hKafOa1OLh/c6wViILQbdfGI2CDohHk 4q+dTJkCiFfDH0iPqQH3qmwAfn4YLRuNIAWRvULbppGFr2QT1IY9NQhfxuC0/UzBz/7A wn2WUVkNUQzzo6OqmhGWaVEADrarHwiqpQEs5Rly6zd1bFVjfN+3mP9kgNuD6nRdvTYS r8jquitRPvatVVer24uSEv6Rb5jWO10xsESOTg8BEerNH2S+FWf1ilXDU6GwnxIh3dde +E/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QarhyAtQeGGy6eRVMrqcKH6hOi/hZt1L7OINUTYHcHE=; b=NUiiUsgHsEH375lkgVkN/ieUQWwoGH031/CtL2GZj9tSdudwxeafCVQPC8UE5yl9KV fpVTsR7U90nFjLMHa0381mTyGicsVKJRre4Y7OZVY9cL4b+B7/wMizbZLu6GGy9hGb59 VWRCg3R0j+hDRIl8eEy01BKGC5lGNXJ3t8l3on5xi7yJp+Cs5y7dii2UuZYd2K3VqC+s CvIViFypBTCxi32U5lBZUNebErGicJC/76im7rCdV+m2VY2QXqIIylbkKlxlJpY+aoXp s8/s2iMZaxFpcbEeIBgt4OrPmDId3+vFeIFyyE0ZGfWFwVdkgGrHr92AAv3PGdiOvjzG hxaQ== X-Gm-Message-State: AO0yUKWUcKrA9vcG3JWaBmdUwniw/hwNMoadmGgmoV4AGmoiuJh8QpHc UFN50owPn8S8YaLzssLMN+ZMH5JZQlqI8Q== X-Google-Smtp-Source: AK7set+4VSoJlvYP6OQEIVEajhfLcxG/Js00NDRkc3Hun+VnqIM7X1asN8PIFzCrEMGAD+KKrjLfjg== X-Received: by 2002:adf:ed52:0:b0:2c5:7c25:5e10 with SMTP id u18-20020adfed52000000b002c57c255e10mr10353137wro.31.1677145153357; Thu, 23 Feb 2023 01:39:13 -0800 (PST) Received: from localhost ([2a01:4b00:d307:1000:f1d3:eb5e:11f4:a7d9]) by smtp.gmail.com with ESMTPSA id m28-20020a05600c3b1c00b003e21ba8684dsm7715976wms.26.2023.02.23.01.39.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Feb 2023 01:39:13 -0800 (PST) From: luca.boccassi@gmail.com To: Jiawen Wu Cc: dpdk stable Subject: patch 'net/txgbe: fix default signal quality value for KX/KX4' has been queued to stable release 20.11.8 Date: Thu, 23 Feb 2023 09:36:40 +0000 Message-Id: <20230223093715.3926893-36-luca.boccassi@gmail.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230223093715.3926893-1-luca.boccassi@gmail.com> References: <20230223093715.3926893-1-luca.boccassi@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 20.11.8 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 02/25/23. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/bluca/dpdk-stable This queued commit can be viewed at: https://github.com/bluca/dpdk-stable/commit/62b31a67404a62fd3e09149f17e541f7f03db80d Thanks. Luca Boccassi --- >From 62b31a67404a62fd3e09149f17e541f7f03db80d Mon Sep 17 00:00:00 2001 From: Jiawen Wu Date: Thu, 2 Feb 2023 17:21:25 +0800 Subject: [PATCH] net/txgbe: fix default signal quality value for KX/KX4 [ upstream commit 7211175417d4f6a7b03a0e7e7355dc62fced8512 ] On old firmware versions, the default value of signal quality(TX_EQ) is configured by the driver. Fix it for KX/KX4 mode. Fixes: 01c3cf5c85a7 ("net/txgbe: add autoneg control read and write") Signed-off-by: Jiawen Wu --- drivers/net/txgbe/base/txgbe_phy.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/net/txgbe/base/txgbe_phy.c b/drivers/net/txgbe/base/txgbe_phy.c index ce6d580636..73f3cdced1 100644 --- a/drivers/net/txgbe/base/txgbe_phy.c +++ b/drivers/net/txgbe/base/txgbe_phy.c @@ -1491,9 +1491,10 @@ txgbe_set_link_to_kx4(struct txgbe_hw *hw, bool autoneg) wr32_epcs(hw, TXGBE_PHY_MISC_CTL0, 0x4F00); value = (0x1804 & ~0x3F3F); + value |= 40 << 8; wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL0, value); - value = (0x50 & ~0x7F) | 40 | (1 << 6); + value = (0x50 & ~0x7F) | (1 << 6); wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL1, value); for (i = 0; i < 4; i++) { @@ -1701,10 +1702,10 @@ txgbe_set_link_to_kx(struct txgbe_hw *hw, wr32_epcs(hw, TXGBE_PHY_MISC_CTL0, 0x4F00); - value = (0x1804 & ~0x3F3F) | (24 << 8) | 4; + value = (0x1804 & ~0x3F3F) | (24 << 8); wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL0, value); - value = (0x50 & ~0x7F) | 16 | (1 << 6); + value = (0x50 & ~0x7F) | (1 << 6); wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL1, value); for (i = 0; i < 4; i++) { -- 2.39.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2023-02-23 09:36:29.683013222 +0000 +++ 0036-net-txgbe-fix-default-signal-quality-value-for-KX-KX.patch 2023-02-23 09:36:28.242170234 +0000 @@ -1 +1 @@ -From 7211175417d4f6a7b03a0e7e7355dc62fced8512 Mon Sep 17 00:00:00 2001 +From 62b31a67404a62fd3e09149f17e541f7f03db80d Mon Sep 17 00:00:00 2001 @@ -5,0 +6,2 @@ +[ upstream commit 7211175417d4f6a7b03a0e7e7355dc62fced8512 ] + @@ -10 +11,0 @@ -Cc: stable@dpdk.org @@ -18 +19 @@ -index 9f46d5bdb0..87935abdaa 100644 +index ce6d580636..73f3cdced1 100644 @@ -21,25 +22,25 @@ -@@ -1693,9 +1693,10 @@ txgbe_set_link_to_kx4(struct txgbe_hw *hw, bool autoneg) - wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL1, value); - } else if (hw->fw_version <= TXGBE_FW_N_TXEQ) { - value = (0x1804 & ~0x3F3F); -+ value |= 40 << 8; - wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL0, value); - -- value = (0x50 & ~0x7F) | 40 | (1 << 6); -+ value = (0x50 & ~0x7F) | (1 << 6); - wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL1, value); - } - out: -@@ -1907,10 +1908,10 @@ txgbe_set_link_to_kx(struct txgbe_hw *hw, - value |= hw->phy.ffe_post | (1 << 6); - wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL1, value); - } else if (hw->fw_version <= TXGBE_FW_N_TXEQ) { -- value = (0x1804 & ~0x3F3F) | (24 << 8) | 4; -+ value = (0x1804 & ~0x3F3F) | (40 << 8); - wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL0, value); - -- value = (0x50 & ~0x7F) | 16 | (1 << 6); -+ value = (0x50 & ~0x7F) | (1 << 6); - wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL1, value); - } - out: +@@ -1491,9 +1491,10 @@ txgbe_set_link_to_kx4(struct txgbe_hw *hw, bool autoneg) + wr32_epcs(hw, TXGBE_PHY_MISC_CTL0, 0x4F00); + + value = (0x1804 & ~0x3F3F); ++ value |= 40 << 8; + wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL0, value); + +- value = (0x50 & ~0x7F) | 40 | (1 << 6); ++ value = (0x50 & ~0x7F) | (1 << 6); + wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL1, value); + + for (i = 0; i < 4; i++) { +@@ -1701,10 +1702,10 @@ txgbe_set_link_to_kx(struct txgbe_hw *hw, + + wr32_epcs(hw, TXGBE_PHY_MISC_CTL0, 0x4F00); + +- value = (0x1804 & ~0x3F3F) | (24 << 8) | 4; ++ value = (0x1804 & ~0x3F3F) | (24 << 8); + wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL0, value); + +- value = (0x50 & ~0x7F) | 16 | (1 << 6); ++ value = (0x50 & ~0x7F) | (1 << 6); + wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL1, value); + + for (i = 0; i < 4; i++) {