From: Hamdan Igbaria <hamdani@nvidia.com>
To: <hamdani@nvidia.com>, <valex@nvidia.com>, <thomas@monjalon.net>,
<suanmingm@nvidia.com>
Cc: <stable@dpdk.org>, <orika@nvidia.com>
Subject: [PATCH 22.11] net/mlx5/hws: fix IPv4 fragment matching
Date: Mon, 10 Apr 2023 15:55:42 +0300 [thread overview]
Message-ID: <20230410125542.3108908-1-hamdani@nvidia.com> (raw)
[ upstream commit f3291366c95096fbe99ab8dd2248d033b191522d ]
Fix IPv4 frag matching in case fragment_offset field is set
to non zero value in the mask.
fragment_offset value is converted using the following logic:
-In case fragment_offset value was set to 0x3fff, then we will
match only on ip_fragmented bit.
-Otherwise we will match fragment_offset based on spec and last
same as any other field.
Fixes: c55c2bf35333 ("net/mlx5/hws: add definer layer")
Signed-off-by: Hamdan Igbaria <hamdani@nvidia.com>
---
drivers/net/mlx5/hws/mlx5dr_definer.c | 11 +++++++++--
drivers/net/mlx5/hws/mlx5dr_definer.h | 9 +++++++--
2 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index 6b98eb8c96..768bed580d 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -123,6 +123,7 @@ struct mlx5dr_definer_conv_data {
X(SET, ipv4_next_proto, v->next_proto_id, rte_ipv4_hdr) \
X(SET, ipv4_version, STE_IPV4, rte_ipv4_hdr) \
X(SET_BE16, ipv4_frag, v->fragment_offset, rte_ipv4_hdr) \
+ X(SET, ip_fragmented, !!v->fragment_offset, rte_ipv4_hdr) \
X(SET_BE16, ipv6_payload_len, v->hdr.payload_len, rte_flow_item_ipv6) \
X(SET, ipv6_proto, v->hdr.proto, rte_flow_item_ipv6) \
X(SET, ipv6_hop_limits, v->hdr.hop_limits, rte_flow_item_ipv6) \
@@ -542,8 +543,14 @@ mlx5dr_definer_conv_item_ipv4(struct mlx5dr_definer_conv_data *cd,
if (m->fragment_offset) {
fc = &cd->fc[DR_CALC_FNAME(IP_FRAG, inner)];
fc->item_idx = item_idx;
- fc->tag_set = &mlx5dr_definer_ipv4_frag_set;
- DR_CALC_SET(fc, eth_l3, fragment_offset, inner);
+ if (rte_be_to_cpu_16(m->fragment_offset) == 0x3fff) {
+ fc->tag_set = &mlx5dr_definer_ip_fragmented_set;
+ DR_CALC_SET(fc, eth_l2, ip_fragmented, inner);
+ } else {
+ fc->is_range = l && l->fragment_offset;
+ fc->tag_set = &mlx5dr_definer_ipv4_frag_set;
+ DR_CALC_SET(fc, eth_l3, ipv4_frag, inner);
+ }
}
if (m->next_proto_id) {
diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.h b/drivers/net/mlx5/hws/mlx5dr_definer.h
index d52c6b0627..5b38a54e6b 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.h
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.h
@@ -196,8 +196,13 @@ struct mlx5_ifc_definer_hl_eth_l3_bits {
u8 time_to_live_hop_limit[0x8];
u8 protocol_next_header[0x8];
u8 identification[0x10];
- u8 flags[0x3];
- u8 fragment_offset[0xd];
+ union {
+ u8 ipv4_frag[0x10];
+ struct {
+ u8 flags[0x3];
+ u8 fragment_offset[0xd];
+ };
+ };
u8 ipv4_total_length[0x10];
u8 checksum[0x10];
u8 reserved_at_60[0xc];
--
2.31.1
next reply other threads:[~2023-04-10 12:56 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-10 12:55 Hamdan Igbaria [this message]
2023-04-18 6:22 ` Xueming(Steven) Li
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