From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DEB6F42EC5 for ; Thu, 20 Jul 2023 12:59:24 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D25A742BD9; Thu, 20 Jul 2023 12:59:24 +0200 (CEST) Received: from mail-wr1-f49.google.com (mail-wr1-f49.google.com [209.85.221.49]) by mails.dpdk.org (Postfix) with ESMTP id 9563340E2D for ; Thu, 20 Jul 2023 12:59:23 +0200 (CEST) Received: by mail-wr1-f49.google.com with SMTP id ffacd0b85a97d-3143798f542so559127f8f.2 for ; Thu, 20 Jul 2023 03:59:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1689850763; x=1690455563; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9ZcNC87Pmx03blFiux4BGEmlb9gHaj03tNLTuV0Hnuk=; b=Ys6emX/MCjmC2RV1NI5RlSdJ3321PyhJsTvFGPKF7oihaRICGnflemfq56LGGiuGJL C1ZHLeqqNUTrYZ+FeNybuI8i05Vdl+EbZ9PHL8GO0cNBHj2ar0zm8SfSa3ohsH5yne33 nWW8n7lgo+fe1T+VEKHzvCls2j2veMlyFY8skri7SGgSA22boWmBFGlSiAVRYjoiPrpd GgoHflJTjfRZjjD306mJnT9j8X+S6xDjATuNFHgH1HgJ95mAGxXC6b+kWuwUmQLAKYJL bbb4irNd5B97AwSBWiM9eg6CoMeyMa0mE5RGT1x1bQRWC/UZ9CrOD6cFJPXLoMFrpG7+ +Ciw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689850763; x=1690455563; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9ZcNC87Pmx03blFiux4BGEmlb9gHaj03tNLTuV0Hnuk=; b=RP/5mmE0jskHANs+uv3ckpjLwqRD4HmYIwUCe5axl1bImjlJ2OuaX/vngNT5+oleVc 0x1JCP+46KFyLJUVTHUaZofA1e3hcbW4OhbS3Z7EH9aMtAqVSc4stROqu0d6+DrOxaUO GfX7D4l8u+gi/G8qM0V7E6TKxVP+I40yyC9oTcNL2xNCYdiB/86jqVhQ7lxA6530jOVW i5QhVEeiXcVU/P0pT55KemDjK66+BiXryi3MUj+RvR1HHOCeiicVSrpgJ+P2I+vzbJtp GMmGgaZu33hxz0BF6MvA60qIzL/P9FPHC4j5f5mArzmU1c5aUktAo2EGWgN7v8zktDz/ EFYg== X-Gm-Message-State: ABy/qLYefy//kvxOfgEEERQ0fx/oxkE0AkyrNT8/qCDzFAr6oovtSyno nCT8qpt5D3OlxJJHtsXfwVGa6R5PiO+c8Ez6 X-Google-Smtp-Source: APBJJlHOpQ1R9eFTT+XbkDreuJFEr8WuGRaxdMiPp3xo+3sumP1jkmME2u+/LYjMkmQlGJVg+ygqMQ== X-Received: by 2002:adf:fd06:0:b0:317:ec8:6e4 with SMTP id e6-20020adffd06000000b003170ec806e4mr1909592wrr.43.1689850763194; Thu, 20 Jul 2023 03:59:23 -0700 (PDT) Received: from localhost ([2a01:4b00:d307:1000:f1d3:eb5e:11f4:a7d9]) by smtp.gmail.com with ESMTPSA id r1-20020adfce81000000b0031128382ed0sm998285wrn.83.2023.07.20.03.59.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Jul 2023 03:59:22 -0700 (PDT) From: luca.boccassi@gmail.com To: Junfeng Guo Cc: Jingjing Wu , dpdk stable Subject: patch 'doc: update BIOS settings and supported HW for NTB' has been queued to stable release 20.11.9 Date: Thu, 20 Jul 2023 11:58:58 +0100 Message-Id: <20230720105859.2537307-9-luca.boccassi@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230720105859.2537307-1-luca.boccassi@gmail.com> References: <20230714223447.1092828-18-luca.boccassi@gmail.com> <20230720105859.2537307-1-luca.boccassi@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 20.11.9 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 07/22/23. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/bluca/dpdk-stable This queued commit can be viewed at: https://github.com/bluca/dpdk-stable/commit/246c48341380e4dc4f1074ecdc9c3153feb02bb7 Thanks. Luca Boccassi --- >From 246c48341380e4dc4f1074ecdc9c3153feb02bb7 Mon Sep 17 00:00:00 2001 From: Junfeng Guo Date: Mon, 3 Jul 2023 17:24:34 +0800 Subject: [PATCH] doc: update BIOS settings and supported HW for NTB [ upstream commit 00e57b0e550b7df2047e6d0bde8965c7ae17d203 ] Update BIOS settings and supported platform list for Intel NTB. Fixes: f5057be340e4 ("raw/ntb: support Intel Ice Lake") Signed-off-by: Junfeng Guo Acked-by: Jingjing Wu --- doc/guides/rawdevs/ntb.rst | 36 +++++++++++++++++++++++------------- 1 file changed, 23 insertions(+), 13 deletions(-) diff --git a/doc/guides/rawdevs/ntb.rst b/doc/guides/rawdevs/ntb.rst index 2bb115d13f..f8befc6594 100644 --- a/doc/guides/rawdevs/ntb.rst +++ b/doc/guides/rawdevs/ntb.rst @@ -1,6 +1,8 @@ .. SPDX-License-Identifier: BSD-3-Clause Copyright(c) 2018 Intel Corporation. +.. include:: + NTB Rawdev Driver ================= @@ -17,19 +19,23 @@ some information by using scratchpad registers. BIOS setting on Intel Xeon -------------------------- -Intel Non-transparent Bridge needs special BIOS setting. The reference for -Skylake is https://www.intel.com/content/dam/support/us/en/documents/server-products/Intel_Xeon_Processor_Scalable_Family_BIOS_User_Guide.pdf - -- Set the needed PCIe port as NTB to NTB mode on both hosts. -- Enable NTB bars and set bar size of bar 23 and bar 45 as 12-29 (4K-512M) - on both hosts (for Ice Lake, bar size can be set as 12-51, namely 4K-128PB). - Note that bar size on both hosts should be the same. -- Disable split bars for both hosts. -- Set crosslink control override as DSD/USP on one host, USD/DSP on - another host. -- Disable PCIe PII SSC (Spread Spectrum Clocking) for both hosts. This - is a hardware requirement. +Intel Non-transparent Bridge (NTB) needs special BIOS settings on both systems. +Note that for 4th Generation Intel\ |reg| Xeon\ |reg| Scalable Processors, +option ``Port Subsystem Mode`` should be changed from ``Gen5`` to ``Gen4 Only``, +then reboot. +- Set ``Non-Transparent Bridge PCIe Port Definition`` for needed PCIe ports + as ``NTB to NTB`` mode, on both hosts. +- Set ``Enable NTB BARs`` as ``Enabled``, on both hosts. +- Set ``Enable SPLIT BARs`` as ``Disabled``, on both hosts. +- Set ``Imbar1 Size``, ``Imbar2 Size``, ``Embar1 Size`` and ``Embar2 Size``, + as 12-29 (i.e., 4K-512M) for 2nd Generation Intel\ |reg| Xeon\ |reg| Scalable Processors; + as 12-51 (i.e., 4K-128PB) for 3rd and 4th Generation Intel\ |reg| Xeon\ |reg| Scalable Processors. + Note that those bar sizes on both hosts should be the same. +- Set ``Crosslink Control override`` as ``DSD/USP`` on one host, + ``USD/DSP`` on another host. +- Set ``PCIe PLL SSC (Spread Spectrum Clocking)`` as ``Disabled``, on both hosts. + This is a hardware requirement when using Re-timer Cards. Device Setup ------------ @@ -145,4 +151,8 @@ like the following: Limitation ---------- -- This PMD only supports Intel Skylake and Ice Lake platforms. +This PMD is only supported on Intel Xeon Platforms: + +- 4th Generation Intel® Xeon® Scalable Processors. +- 3rd Generation Intel® Xeon® Scalable Processors. +- 2nd Generation Intel® Xeon® Scalable Processors. -- 2.39.2 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2023-07-20 11:54:24.606634726 +0100 +++ 0009-doc-update-BIOS-settings-and-supported-HW-for-NTB.patch 2023-07-20 11:54:24.253504813 +0100 @@ -1 +1 @@ -From 00e57b0e550b7df2047e6d0bde8965c7ae17d203 Mon Sep 17 00:00:00 2001 +From 246c48341380e4dc4f1074ecdc9c3153feb02bb7 Mon Sep 17 00:00:00 2001 @@ -5,0 +6,2 @@ +[ upstream commit 00e57b0e550b7df2047e6d0bde8965c7ae17d203 ] + @@ -9 +10,0 @@ -Cc: stable@dpdk.org