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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by DS1PEPF00017092.mail.protection.outlook.com (10.167.17.135) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6933.15 via Frontend Transport; Sun, 22 Oct 2023 14:29:20 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Sun, 22 Oct 2023 07:29:13 -0700 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Sun, 22 Oct 2023 07:29:12 -0700 From: Xueming Li To: Amit Prakash Shukla CC: dpdk stable Subject: patch 'dma/cnxk: fix device reconfigure' has been queued to stable release 22.11.4 Date: Sun, 22 Oct 2023 22:21:39 +0800 Message-ID: <20231022142250.10324-71-xuemingl@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231022142250.10324-1-xuemingl@nvidia.com> References: <20231022142250.10324-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF00017092:EE_|SJ0PR12MB5610:EE_ X-MS-Office365-Filtering-Correlation-Id: da0a3f7b-9b3a-4a5c-9e09-08dbd30b47eb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Oct 2023 14:29:20.6375 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: da0a3f7b-9b3a-4a5c-9e09-08dbd30b47eb X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF00017092.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB5610 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 22.11.4 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 11/15/23. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://git.dpdk.org/dpdk-stable/log/?h=22.11-staging This queued commit can be viewed at: https://git.dpdk.org/dpdk-stable/commit/?h=22.11-staging&id=46d25f17a6bd5364a6b78c9ea1f78bb3e4525c98 Thanks. Xueming Li --- >From 46d25f17a6bd5364a6b78c9ea1f78bb3e4525c98 Mon Sep 17 00:00:00 2001 From: Amit Prakash Shukla Date: Wed, 23 Aug 2023 16:45:17 +0530 Subject: [PATCH] dma/cnxk: fix device reconfigure Cc: Xueming Li [ upstream commit 95a955e3e024770ea6b74556251b9da8caa87f17 ] Multiple call to configure, setup queues without stopping the device would leak the ring descriptor and hardware queue memory. This patch adds flags support to prevent configuring without stopping the device. Fixes: b56f1e2dad38 ("dma/cnxk: add channel operations") Signed-off-by: Amit Prakash Shukla --- drivers/dma/cnxk/cnxk_dmadev.c | 32 +++++++++++++++++++++++++++++--- drivers/dma/cnxk/cnxk_dmadev.h | 5 +++++ 2 files changed, 34 insertions(+), 3 deletions(-) diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c index b2f4b332f4..95f47015dd 100644 --- a/drivers/dma/cnxk/cnxk_dmadev.c +++ b/drivers/dma/cnxk/cnxk_dmadev.c @@ -45,14 +45,22 @@ cnxk_dmadev_configure(struct rte_dma_dev *dev, int rc = 0; RTE_SET_USED(conf); - RTE_SET_USED(conf); - RTE_SET_USED(conf_sz); RTE_SET_USED(conf_sz); + dpivf = dev->fp_obj->dev_private; + + if (dpivf->flag & CNXK_DPI_DEV_CONFIG) + return rc; + rc = roc_dpi_configure(&dpivf->rdpi); - if (rc < 0) + if (rc < 0) { plt_err("DMA configure failed err = %d", rc); + goto done; + } + dpivf->flag |= CNXK_DPI_DEV_CONFIG; + +done: return rc; } @@ -69,6 +77,9 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan, RTE_SET_USED(vchan); RTE_SET_USED(conf_sz); + if (dpivf->flag & CNXK_DPI_VCHAN_CONFIG) + return 0; + header->cn9k.pt = DPI_HDR_PT_ZBW_CA; switch (conf->direction) { @@ -108,6 +119,7 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan, dpivf->conf.c_desc.max_cnt = DPI_MAX_DESC; dpivf->conf.c_desc.head = 0; dpivf->conf.c_desc.tail = 0; + dpivf->flag |= CNXK_DPI_VCHAN_CONFIG; return 0; } @@ -125,6 +137,10 @@ cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan, RTE_SET_USED(vchan); RTE_SET_USED(conf_sz); + + if (dpivf->flag & CNXK_DPI_VCHAN_CONFIG) + return 0; + header->cn10k.pt = DPI_HDR_PT_ZBW_CA; switch (conf->direction) { @@ -164,6 +180,7 @@ cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan, dpivf->conf.c_desc.max_cnt = DPI_MAX_DESC; dpivf->conf.c_desc.head = 0; dpivf->conf.c_desc.tail = 0; + dpivf->flag |= CNXK_DPI_VCHAN_CONFIG; return 0; } @@ -173,10 +190,15 @@ cnxk_dmadev_start(struct rte_dma_dev *dev) { struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private; + if (dpivf->flag & CNXK_DPI_DEV_START) + return 0; + dpivf->desc_idx = 0; dpivf->num_words = 0; roc_dpi_enable(&dpivf->rdpi); + dpivf->flag |= CNXK_DPI_DEV_START; + return 0; } @@ -187,6 +209,8 @@ cnxk_dmadev_stop(struct rte_dma_dev *dev) roc_dpi_disable(&dpivf->rdpi); + dpivf->flag &= ~CNXK_DPI_DEV_START; + return 0; } @@ -198,6 +222,8 @@ cnxk_dmadev_close(struct rte_dma_dev *dev) roc_dpi_disable(&dpivf->rdpi); roc_dpi_dev_fini(&dpivf->rdpi); + dpivf->flag = 0; + return 0; } diff --git a/drivers/dma/cnxk/cnxk_dmadev.h b/drivers/dma/cnxk/cnxk_dmadev.h index e1f5694f50..d58554787f 100644 --- a/drivers/dma/cnxk/cnxk_dmadev.h +++ b/drivers/dma/cnxk/cnxk_dmadev.h @@ -15,6 +15,10 @@ */ #define DPI_REQ_CDATA 0xFF +#define CNXK_DPI_DEV_CONFIG (1ULL << 0) +#define CNXK_DPI_VCHAN_CONFIG (1ULL << 1) +#define CNXK_DPI_DEV_START (1ULL << 2) + struct cnxk_dpi_compl_s { uint64_t cdata; void *cb_data; @@ -39,6 +43,7 @@ struct cnxk_dpi_vf_s { uint64_t cmd[DPI_MAX_CMD_SIZE]; uint32_t num_words; uint16_t desc_idx; + uint16_t flag; }; #endif -- 2.25.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2023-10-22 22:17:36.956777100 +0800 +++ 0070-dma-cnxk-fix-device-reconfigure.patch 2023-10-22 22:17:34.296723700 +0800 @@ -1 +1 @@ -From 95a955e3e024770ea6b74556251b9da8caa87f17 Mon Sep 17 00:00:00 2001 +From 46d25f17a6bd5364a6b78c9ea1f78bb3e4525c98 Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Xueming Li + +[ upstream commit 95a955e3e024770ea6b74556251b9da8caa87f17 ] @@ -12 +14,0 @@ -Cc: stable@dpdk.org @@ -21 +23 @@ -index d8bd61a048..a7279fbd3a 100644 +index b2f4b332f4..95f47015dd 100644 @@ -60 +62,2 @@ -@@ -109,6 +120,7 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan, +@@ -108,6 +119,7 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan, + dpivf->conf.c_desc.max_cnt = DPI_MAX_DESC; @@ -63 +65,0 @@ - dpivf->pending = 0; @@ -68 +70 @@ -@@ -126,6 +138,10 @@ cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan, +@@ -125,6 +137,10 @@ cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan, @@ -79 +81,2 @@ -@@ -166,6 +182,7 @@ cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan, +@@ -164,6 +180,7 @@ cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan, + dpivf->conf.c_desc.max_cnt = DPI_MAX_DESC; @@ -82 +84,0 @@ - dpivf->pending = 0; @@ -87 +89 @@ -@@ -175,11 +192,16 @@ cnxk_dmadev_start(struct rte_dma_dev *dev) +@@ -173,10 +190,15 @@ cnxk_dmadev_start(struct rte_dma_dev *dev) @@ -95,2 +97 @@ - dpivf->pending = 0; - dpivf->pnum_words = 0; + dpivf->num_words = 0; @@ -104 +105 @@ -@@ -190,6 +212,8 @@ cnxk_dmadev_stop(struct rte_dma_dev *dev) +@@ -187,6 +209,8 @@ cnxk_dmadev_stop(struct rte_dma_dev *dev) @@ -113 +114 @@ -@@ -201,6 +225,8 @@ cnxk_dmadev_close(struct rte_dma_dev *dev) +@@ -198,6 +222,8 @@ cnxk_dmadev_close(struct rte_dma_dev *dev) @@ -123 +124 @@ -index 943e9e3013..573bcff165 100644 +index e1f5694f50..d58554787f 100644 @@ -126 +127 @@ -@@ -16,6 +16,10 @@ +@@ -15,6 +15,10 @@ @@ -137,3 +138,3 @@ -@@ -41,6 +45,7 @@ struct cnxk_dpi_vf_s { - uint16_t pending; - uint16_t pnum_words; +@@ -39,6 +43,7 @@ struct cnxk_dpi_vf_s { + uint64_t cmd[DPI_MAX_CMD_SIZE]; + uint32_t num_words;