From: Venkat Kumar Ande <venkatkumar.ande@amd.com>
To: <dev@dpdk.org>
Cc: <Selwin.Sebastian@amd.com>,
Venkat Kumar Ande <VenkatKumar.Ande@amd.com>, <stable@dpdk.org>,
Selwin Sebastian <selwin.sebastian@amd.com>
Subject: [PATCH v3 09/25] net/axgbe: fix logic around active and passive cables
Date: Tue, 4 Jun 2024 17:41:41 +0530 [thread overview]
Message-ID: <20240604121157.3052-9-venkatkumar.ande@amd.com> (raw)
In-Reply-To: <20240604121157.3052-1-venkatkumar.ande@amd.com>
From: Venkat Kumar Ande <VenkatKumar.Ande@amd.com>
SFP+ active and passive cables are copper cables with fixed SFP+ end
connectors. Due to a misinterpretation of this, SFP+ active cables could
end up not being recognized, causing the driver to fail to establish a
connection.
Introduce a new enum in SFP+ cable types, XGBE_SFP_CABLE_FIBER, that is
the default cable type, and handle active and passive cables when they are
specifically detected.
Fixes: a5c7273771e8 ("net/axgbe: add phy programming APIs")
Cc: stable@dpdk.org
Signed-off-by: Venkat Kumar Ande <VenkatKumar.Ande@amd.com>
Acked-by: Selwin Sebastian <selwin.sebastian@amd.com>
---
drivers/net/axgbe/axgbe_phy_impl.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/net/axgbe/axgbe_phy_impl.c b/drivers/net/axgbe/axgbe_phy_impl.c
index 10196cae94..d9585a7404 100644
--- a/drivers/net/axgbe/axgbe_phy_impl.c
+++ b/drivers/net/axgbe/axgbe_phy_impl.c
@@ -69,6 +69,7 @@ enum axgbe_sfp_cable {
AXGBE_SFP_CABLE_UNKNOWN = 0,
AXGBE_SFP_CABLE_ACTIVE,
AXGBE_SFP_CABLE_PASSIVE,
+ AXGBE_SFP_CABLE_FIBER,
};
enum axgbe_sfp_base {
@@ -616,16 +617,18 @@ static void axgbe_phy_sfp_parse_eeprom(struct axgbe_port *pdata)
axgbe_phy_sfp_parse_quirks(pdata);
- /* Assume ACTIVE cable unless told it is PASSIVE */
+ /* Assume FIBER cable unless told otherwise */
if (sfp_base[AXGBE_SFP_BASE_CABLE] & AXGBE_SFP_BASE_CABLE_PASSIVE) {
phy_data->sfp_cable = AXGBE_SFP_CABLE_PASSIVE;
phy_data->sfp_cable_len = sfp_base[AXGBE_SFP_BASE_CU_CABLE_LEN];
- } else {
+ } else if (sfp_base[AXGBE_SFP_BASE_CABLE] & AXGBE_SFP_BASE_CABLE_ACTIVE) {
phy_data->sfp_cable = AXGBE_SFP_CABLE_ACTIVE;
+ } else {
+ phy_data->sfp_cable = AXGBE_SFP_CABLE_FIBER;
}
/* Determine the type of SFP */
- if (phy_data->sfp_cable == AXGBE_SFP_CABLE_PASSIVE &&
+ if (phy_data->sfp_cable != AXGBE_SFP_CABLE_FIBER &&
axgbe_phy_sfp_bit_rate(sfp_eeprom, AXGBE_SFP_SPEED_10000))
phy_data->sfp_base = AXGBE_SFP_BASE_10000_CR;
else if (sfp_base[AXGBE_SFP_BASE_10GBE_CC] & AXGBE_SFP_BASE_10GBE_CC_SR)
--
2.34.1
next prev parent reply other threads:[~2024-06-04 12:12 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20240507124305.2318-1-VenkatKumar.Ande@amd.com>
2024-06-04 12:11 ` [PATCH v3 01/25] net/axgbe: fix mdio access for non-zero ports and CL45 PHYs Venkat Kumar Ande
2024-06-04 12:11 ` [PATCH v3 02/25] net/axgbe: reset link when the link never comes back Venkat Kumar Ande
2024-06-04 12:11 ` [PATCH v3 03/25] net/axgbe: fix fluctuations for 1G BELFUSE SFP Venkat Kumar Ande
2024-06-04 12:11 ` [PATCH v3 04/25] net/axgbe: update DMA coherency values Venkat Kumar Ande
2024-06-04 12:11 ` [PATCH v3 05/25] net/axgbe: disable interrupts during device removal Venkat Kumar Ande
2024-06-04 12:11 ` [PATCH v3 06/25] net/axgbe: yellow carp devices do not need rrc Venkat Kumar Ande
2024-06-04 12:11 ` [PATCH v3 07/25] net/axgbe: enable PLL control for fixed PHY modes only Venkat Kumar Ande
2024-06-04 12:11 ` [PATCH v3 08/25] net/axgbe: fix the SFP codes check for DAC cables Venkat Kumar Ande
2024-06-04 12:11 ` Venkat Kumar Ande [this message]
2024-06-04 12:11 ` [PATCH v3 10/25] net/axgbe: check only the minimum speed for cables Venkat Kumar Ande
2024-06-04 12:11 ` [PATCH v3 11/25] net/axgbe: flow Tx Ctrl Registers are h/w version dependent Venkat Kumar Ande
2024-06-04 12:11 ` [PATCH v3 12/25] net/axgbe: delay AN timeout during KR training Venkat Kumar Ande
2024-06-04 12:11 ` [PATCH v3 13/25] net/axgbe: fix the false linkup in axgbe PHY status Venkat Kumar Ande
2024-06-05 17:07 ` [PATCH v3 01/25] net/axgbe: fix mdio access for non-zero ports and CL45 PHYs Ferruh Yigit
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