From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C2494454E9 for ; Tue, 25 Jun 2024 02:00:30 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BD1D841148; Tue, 25 Jun 2024 02:00:30 +0200 (CEST) Received: from mail-wr1-f54.google.com (mail-wr1-f54.google.com [209.85.221.54]) by mails.dpdk.org (Postfix) with ESMTP id AD8A641143 for ; Tue, 25 Jun 2024 02:00:29 +0200 (CEST) Received: by mail-wr1-f54.google.com with SMTP id ffacd0b85a97d-365663f51adso3654401f8f.1 for ; Mon, 24 Jun 2024 17:00:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1719273629; x=1719878429; darn=dpdk.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4txURh2oX+m3CacyH5r0IZsDOeLioFsxFOM2BH9e950=; b=BvvpMUqdtwjYIGEhZ/JP7eaANOZsWDem3Mo9Co8E84/dg5x6MGuygGBRMfAHM7mqM3 5bU6FPETFSV4lTIwYjIGcr11vxT/XPfkvtRizTEATAAzb072EZfCVw79Q76iDtQrw+ub yxuAv5Js50JdDSgWvikialIHVHVUvbO7MNZYeEEzMnOKVdA+bnfagthMM5ZUNax5DzNb 0TrcIVDByWLh3QR0h2AvO3c76DilvniZDlWUryII9PdunxLt6WcrSl+GnQx5R1Nq93EM 0Q/rbj6XaxQF6X2akVX15/JcgFxzvL+mM45Lwr/rknR4cXck28C4/iKbRP+lBdPyCBXZ NKdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719273629; x=1719878429; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4txURh2oX+m3CacyH5r0IZsDOeLioFsxFOM2BH9e950=; b=JNlSyDtdyZijambb5rLdOrUeWDs3xAB3LxyxGHWqFsNFT1Mx8NR6Sv9MNBX5CgIiXc n8OQib1cqy3sQwtefGfIFeonjuNH9Z2CPNvO7UYB9QaVrIaKecnhvvr1KOvBl7Z5+XNa T6VSEGdJ3ZOVHHbLy/L3KSNAUfh4AhvT4iZWWgaeEJfptBVZD8DTKuMxMVh1YEt1/4Xc fGm4Ja+AetM093j6AAjmADNYMER6Ho85VU+lEnBd3RwTP7kVigcDOni6hQQejCMM/T1S f6p+4a6Fc10uHWynDUNT3XRBYE48zyNdqLkTWXrDHCsv5gRyUDvJyC28l69NVnr7ydjC nUTQ== X-Forwarded-Encrypted: i=1; AJvYcCUr7uFMiBj3+EiW8971cup5jmMwdNKlPuT1bGV5SII7hrbKKIH/X1luMM9oB/bFM95H3sWn/kxRMiUZ1FTxNco= X-Gm-Message-State: AOJu0YzxKFX185n7qMMEESa3F6+zbyn66XzmQCwt2y8O0Kgv/5TZbYAW /UbrmBH5VbDDP/hN52EFVd69cOiag31900wF+R5oQBv2mjmldiOuLMl7dw== X-Google-Smtp-Source: AGHT+IFg8PtiFifiePQ2kBSqeiadge0RjSHRmgoPM54Bx6d8f2scfxazWmF+KE5hOTKcK/hV5DRk9w== X-Received: by 2002:adf:f683:0:b0:360:7829:bb93 with SMTP id ffacd0b85a97d-366e4ed3009mr4422725f8f.21.1719273629272; Mon, 24 Jun 2024 17:00:29 -0700 (PDT) Received: from localhost ([137.220.120.171]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-366eaa892easm6141107f8f.71.2024.06.24.17.00.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Jun 2024 17:00:28 -0700 (PDT) From: luca.boccassi@gmail.com To: Venkat Kumar Ande Cc: Selwin Sebastian , dpdk stable Subject: patch 'net/axgbe: update DMA coherency values' has been queued to stable release 22.11.6 Date: Tue, 25 Jun 2024 00:58:11 +0100 Message-Id: <20240624235907.885628-25-luca.boccassi@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240624235907.885628-1-luca.boccassi@gmail.com> References: <20240624235907.885628-1-luca.boccassi@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 22.11.6 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 06/27/24. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/bluca/dpdk-stable This queued commit can be viewed at: https://github.com/bluca/dpdk-stable/commit/6aad2db82c5f5e7c69e1efff79d3296002253e8e Thanks. Luca Boccassi --- >From 6aad2db82c5f5e7c69e1efff79d3296002253e8e Mon Sep 17 00:00:00 2001 From: Venkat Kumar Ande Date: Tue, 4 Jun 2024 17:41:36 +0530 Subject: [PATCH] net/axgbe: update DMA coherency values [ upstream commit 4e6d9f193d4fe5639a856cdb2dd0aa4a8726fe99 ] Based on the IOMMU configuration, the current cache control settings can result in possible coherency issues. The hardware team has recommended new settings for the PCI device path to eliminate the issue. Without the fix the user will get incorrect data in TSO functionality Fixes: 7c4158a5b592 ("net/axgbe: add DMA programming and start/stop") Signed-off-by: Venkat Kumar Ande Acked-by: Selwin Sebastian --- drivers/net/axgbe/axgbe_dev.c | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-) diff --git a/drivers/net/axgbe/axgbe_dev.c b/drivers/net/axgbe/axgbe_dev.c index 3389954aa6..9b0073eea6 100644 --- a/drivers/net/axgbe/axgbe_dev.c +++ b/drivers/net/axgbe/axgbe_dev.c @@ -647,23 +647,21 @@ static void axgbe_config_dma_cache(struct axgbe_port *pdata) unsigned int arcache, awcache, arwcache; arcache = 0; - AXGMAC_SET_BITS(arcache, DMA_AXIARCR, DRC, 0x3); + AXGMAC_SET_BITS(arcache, DMA_AXIARCR, DRC, 0xf); + AXGMAC_SET_BITS(arcache, DMA_AXIARCR, TEC, 0xf); + AXGMAC_SET_BITS(arcache, DMA_AXIARCR, THC, 0xf); AXGMAC_IOWRITE(pdata, DMA_AXIARCR, arcache); awcache = 0; - AXGMAC_SET_BITS(awcache, DMA_AXIAWCR, DWC, 0x3); - AXGMAC_SET_BITS(awcache, DMA_AXIAWCR, RPC, 0x3); - AXGMAC_SET_BITS(awcache, DMA_AXIAWCR, RPD, 0x1); - AXGMAC_SET_BITS(awcache, DMA_AXIAWCR, RHC, 0x3); - AXGMAC_SET_BITS(awcache, DMA_AXIAWCR, RHD, 0x1); - AXGMAC_SET_BITS(awcache, DMA_AXIAWCR, RDC, 0x3); - AXGMAC_SET_BITS(awcache, DMA_AXIAWCR, RDD, 0x1); + AXGMAC_SET_BITS(awcache, DMA_AXIAWCR, DWC, 0xf); + AXGMAC_SET_BITS(awcache, DMA_AXIAWCR, RPC, 0xf); + AXGMAC_SET_BITS(awcache, DMA_AXIAWCR, RHC, 0xf); + AXGMAC_SET_BITS(awcache, DMA_AXIAWCR, RDC, 0xf); AXGMAC_IOWRITE(pdata, DMA_AXIAWCR, awcache); arwcache = 0; - AXGMAC_SET_BITS(arwcache, DMA_AXIAWRCR, TDWD, 0x1); - AXGMAC_SET_BITS(arwcache, DMA_AXIAWRCR, TDWC, 0x3); - AXGMAC_SET_BITS(arwcache, DMA_AXIAWRCR, RDRC, 0x3); + AXGMAC_SET_BITS(arwcache, DMA_AXIAWRCR, TDWC, 0xf); + AXGMAC_SET_BITS(arwcache, DMA_AXIAWRCR, RDRC, 0xf); AXGMAC_IOWRITE(pdata, DMA_AXIAWRCR, arwcache); } -- 2.39.2 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2024-06-25 00:22:15.176961043 +0100 +++ 0025-net-axgbe-update-DMA-coherency-values.patch 2024-06-25 00:22:13.113184181 +0100 @@ -1 +1 @@ -From 4e6d9f193d4fe5639a856cdb2dd0aa4a8726fe99 Mon Sep 17 00:00:00 2001 +From 6aad2db82c5f5e7c69e1efff79d3296002253e8e Mon Sep 17 00:00:00 2001 @@ -5,0 +6,2 @@ +[ upstream commit 4e6d9f193d4fe5639a856cdb2dd0aa4a8726fe99 ] + @@ -13 +14,0 @@ -Cc: stable@dpdk.org