[PATCH v4 1/2] net/cpfl: fix check for opcodes of received ctlq messages

[Soumyadeep Hore <soumyadeep.hore@intel.com>]

Include checks for error status returned for specific
opcodes and display error messages accordingly.

Fixes: db042ef09d26 ("net/cpfl: implement FXP rule creation and destroying")
Cc: stable@dpdk.org

Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com>
---
 drivers/net/cpfl/cpfl_fxp_rule.c |  8 ++++++++
 drivers/net/cpfl/cpfl_rules.h    | 11 +++++++++++
 2 files changed, 19 insertions(+)

diff --git a/drivers/net/cpfl/cpfl_fxp_rule.c b/drivers/net/cpfl/cpfl_fxp_rule.c
index 0e710a007b..f48ecd5656 100644
--- a/drivers/net/cpfl/cpfl_fxp_rule.c
+++ b/drivers/net/cpfl/cpfl_fxp_rule.c
@@ -92,6 +92,14 @@ cpfl_receive_ctlq_msg(struct idpf_hw *hw, struct idpf_ctlq_info *cq, u16 num_q_m
 
 		/* TODO - process rx controlq message */
 		for (i = 0; i < num_q_msg; i++) {
+			ret = q_msg[i].status;
+			if (ret &&
+				q_msg[i].opcode != cpfl_ctlq_sem_query_del_rule_hash_addr) {
+				PMD_INIT_LOG(ERR, "Failed to process rx_ctrlq msg: %s",
+					cpfl_cfg_pkt_errormsg[ret]);
+				return ret;
+			}
+
 			if (q_msg[i].data_len > 0)
 				dma = q_msg[i].ctx.indirect.payload;
 			else
diff --git a/drivers/net/cpfl/cpfl_rules.h b/drivers/net/cpfl/cpfl_rules.h
index d23eae8e91..10569b1fdc 100644
--- a/drivers/net/cpfl/cpfl_rules.h
+++ b/drivers/net/cpfl/cpfl_rules.h
@@ -62,6 +62,17 @@ enum cpfl_cfg_pkt_error_code {
 	CPFL_CFG_PKT_ERR_EMAXCOL = 9    /* Max Hash Collision */
 };
 
+static const char * const cpfl_cfg_pkt_errormsg[] = {
+	[CPFL_CFG_PKT_ERR_ESRCH] = "Bad opcode",
+	[CPFL_CFG_PKT_ERR_EEXIST] = "The rule conflicts with already existed one",
+	[CPFL_CFG_PKT_ERR_ENOSPC] = "No space left in the table",
+	[CPFL_CFG_PKT_ERR_ERANGE] = "Parameter out of range",
+	[CPFL_CFG_PKT_ERR_ESBCOMP] = "Completion error",
+	[CPFL_CFG_PKT_ERR_ENOPIN] = "Entry cannot be pinned in cache",
+	[CPFL_CFG_PKT_ERR_ENOTFND] = "Entry does not exist",
+	[CPFL_CFG_PKT_ERR_EMAXCOL] = "Maximum Hash Collisions reached",
+};
+
 /* macros for creating context for rule descriptor */
 #define MEV_RULE_VSI_ID_S		0
 #define MEV_RULE_VSI_ID_M		\
-- 
2.43.0