From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B47E3457A1 for ; Mon, 12 Aug 2024 15:03:00 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id AEF6240666; Mon, 12 Aug 2024 15:03:00 +0200 (CEST) Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2061.outbound.protection.outlook.com [40.107.94.61]) by mails.dpdk.org (Postfix) with ESMTP id A03BC402C3 for ; Mon, 12 Aug 2024 15:02:58 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=YdiRv+EwPr9yMSoM/6KPMyl06Pnf8hOZV+yff5w00NmAX+l2dU+uHGYsj3fA2a0IXS3a9FfEPWBchGnMN3Wzn16NaTNbp1VsiyxJKElnSfBNhg1STxC7y5wfvFmPTbhSdBZB///i6tIK5DrSXVwcC/6pSOT2YV3+CifrOhWSiFV1pWksJ9Rd6eXwGrSuir5lwrLQMYdLKHxsaNQYNdVduSYQ2wsboxOuWXYS4iDb8e0MTevwDyz9mbPEl2Kw3MZ0stxoeRcghsWnxsb9oYMCpUQ5M6qywZ367VWQk2jKH0T5XJPjY1V5yDZzgQFvge0Q1f1+kkyld1IweDL2B9QY+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Kf25sQF/+lTrIetyoE6H6Rk0+LfNPNIfSmsLH+VQ6G4=; b=JbgPCNNVSrQZ577JaNPY9+f42r2Dtmx+P5VDp2WNfSFLIizMJgDRFr9d9YrHFFINcp7R0SzCV2t+tMhnMPTW/WEPRJE1h4bYpv5hY4hOgxmR1CKP2qTaWnmktKoAbJjruiBHKZKDG0LfMe3xcrJAA+fzGWRUA+C/jFM7cwvRxE3jhxd++zTXTIdsff+tRknlYR3h/1OgZybXn/M+5SsXrISXgXqXX/4IWFmCCBmQbNUKLUcvihkQKazWO/+fcZWgC81h3PkYEDMjE6V3SwBkUz8x7hJiaE+1RoIWE1nvr8DuhZsd8prgArRq8uZM2DnBA2zX1P1yfr15M9cJPuUCqQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Kf25sQF/+lTrIetyoE6H6Rk0+LfNPNIfSmsLH+VQ6G4=; b=cqt2rL+ouqnpAPyEEEJxiJ/OPIQE3pi/naQhMs6Dgl+U1BixjL2jsr1466+CgvgW6yLgUmZHPNtm3I25hPaeppKT0G6Uy9wFGw9hmiWGzQqYYeiMCl4HZUEI6fqBI28MK75cwMGGeAcmzCGiWIrNAE3c/cazdCeOcgJ0IC0zFq3Idcd87g2BvRwtRB0GgZfZTXtK+rqq64Ttcp9DVqQ5sN+OROgHOlUTpZMISRlGUcOuLNY0gPz3syTbjtlto8osdqKTcp7Uoop8KVlC/zTht6MHk10hnyuRKpAh+bg5t8Vy11U0ds+tI61TK02Hj4v6U0Y0YSy3p7MgD25dKTAsfg== Received: from SA9PR13CA0099.namprd13.prod.outlook.com (2603:10b6:806:24::14) by DS7PR12MB8083.namprd12.prod.outlook.com (2603:10b6:8:e4::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7849.20; Mon, 12 Aug 2024 13:02:55 +0000 Received: from SN1PEPF0002636D.namprd02.prod.outlook.com (2603:10b6:806:24:cafe::20) by SA9PR13CA0099.outlook.office365.com (2603:10b6:806:24::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7849.22 via Frontend Transport; Mon, 12 Aug 2024 13:02:54 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by SN1PEPF0002636D.mail.protection.outlook.com (10.167.241.138) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7849.8 via Frontend Transport; Mon, 12 Aug 2024 13:02:54 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Mon, 12 Aug 2024 06:02:37 -0700 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Mon, 12 Aug 2024 06:02:35 -0700 From: Xueming Li To: Bing Zhao CC: , Viacheslav Ovsiienko , "dpdk stable" Subject: patch 'net/mlx5: fix end condition of reading xstats' has been queued to stable release 23.11.2 Date: Mon, 12 Aug 2024 20:50:02 +0800 Message-ID: <20240812125035.389667-126-xuemingl@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240812125035.389667-1-xuemingl@nvidia.com> References: <20240712110153.309690-23-xuemingl@nvidia.com> <20240812125035.389667-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636D:EE_|DS7PR12MB8083:EE_ X-MS-Office365-Filtering-Correlation-Id: b0693bfe-c459-4303-59c7-08dcbacf14bb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|376014|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?HaI+UCd1q2iL231LNtNvhnKUgupNdRBJPvFVNzGoCVCmFipILaTxVgz2B/TR?= =?us-ascii?Q?hnieJ5B5y8Bn0Np2PdhPVVrvh59wCLlWwW31fnYrcp/Xpe8H8LyvBVVidhN5?= =?us-ascii?Q?rmJmUyiyQvFWHHJcpaqRnh8H7zU9h0hB/D0vkZE2ceJntTtiQEFvGxkNDroi?= =?us-ascii?Q?IKGnztV8/yPPdmTmDCVmYxlRKMYkwwlKvaB6kUi+v1a8ybnzD3iADU7SXjWi?= =?us-ascii?Q?kfBWhKcLoCtGVkgIifnEdE4vlW6oGKKgfrD9RXZYvRb/EIJYK3H3xdfJB3+7?= =?us-ascii?Q?D4KKdMR0Wg0HrphekF7zqU6NFWIiabgzvG4tNZLFSF1gySSFS2DPklqVYzwD?= =?us-ascii?Q?Jc61CZ/hCVmqPp8ct1drU7x4khLwwB7YrogJpdg9H3sNnO3HBEb8Rn8Jfmvs?= =?us-ascii?Q?+EKBdBvf9T38Fbm7fFhLqnGYsBV+BbIyWv05OL7s9BNtQhEkGAULev2O4Orp?= =?us-ascii?Q?g6TgWsTTshwsCFClvAM6SKNJZcLBct0y2wLjZGBLFk+aQ5iEIwv0FkCwNgZ7?= =?us-ascii?Q?yiCWHFZWGywTBcRo803my2eg+G5owL8ZYdp6MP8O8ubQTwOiqO37JbyWgoKT?= =?us-ascii?Q?wXYkCp5wzLZYjlhxCh1qRC6WfcM5gigZEwp75M1DVUhQ2FIQ1GQhqa0W1Ok2?= =?us-ascii?Q?LAyEf95zuwKny0xNsiKr5DjQT1Vy5HQvw+jrJnsxWQN+DdKpawLbimnClDR6?= =?us-ascii?Q?BNP87HO4fQbD0RTxrwtyqkXDoXvw47pMOiQt0Yx09jQXiQ/0Det4Caa+VNLC?= =?us-ascii?Q?2UmxGrFqIynPPxTVSC+FmoK2XG32kmjU9Benp0RLfQGse76j2WvrLImnIS5U?= =?us-ascii?Q?a23LtfNBqnMzIF26gLBXtq1MrvFveN6dtYwCGsiHGPXdHerzIogir5dC76OU?= =?us-ascii?Q?kI7UTuUNEtU+bxSl/FU6LdiFDz/rBoPZgmlk+g1vU4Tbym0G5EpfnkY32S3Y?= =?us-ascii?Q?8JyLPv02dLuIw8kZZV0ZiqcqbCzIHxGnjLvdyLgeLY775VWVOrtGHWB3j2wY?= =?us-ascii?Q?bCS0oxteIAQZbjVLaitTccPSCBVf5xkpNTkEQzAW/4LgtO9YEeLokRTVXIwU?= =?us-ascii?Q?T/wyHz3FtwGn5Xdtt2/hPS/nVc3ByM33JAMCIe8HziBYg6EZwg9ulL3DOGmD?= =?us-ascii?Q?yL0xqFwvYYZiV1RnEJAqEEgyafeJ+XpNIaza9vjoO09JMb3T/I2MvKGLpfrC?= =?us-ascii?Q?ptcvPb7Br666Q4AKYNNP3Pi9KIXKu010V8Z+mgjF4/YwztOQeWwBrtE1b1Cp?= =?us-ascii?Q?AQrtR2cam3JpNBC80dmMeS8g4DgJAGC+gqjaY19hFdQPB3IQYaCLmCw0KeOK?= =?us-ascii?Q?X8ThG4lLL1KyR9KyqvCef/wrYSOj5rQcAbKuwc0Wk202tzaZLzVCqUWAZzGq?= =?us-ascii?Q?xitWEWkW3epaOPBC71Z5b5j2UbtzIlpeTGyfLWNPOu5WldARwEmzHInScvDx?= =?us-ascii?Q?zhCJw2wXZivNcmYAobY1m9yw2fEoj4as?= X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(36860700013)(376014)(82310400026)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Aug 2024 13:02:54.7180 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b0693bfe-c459-4303-59c7-08dcbacf14bb X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB8083 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 23.11.2 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 08/14/24. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging This queued commit can be viewed at: https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=07ad92c1a69b27be817a22f7afd590cef0098c6b Thanks. Xueming Li --- >From 07ad92c1a69b27be817a22f7afd590cef0098c6b Mon Sep 17 00:00:00 2001 From: Bing Zhao Date: Wed, 17 Jul 2024 19:33:37 +0300 Subject: [PATCH] net/mlx5: fix end condition of reading xstats Cc: Xueming Li [ upstream commit 1be61fe1333cd4a8a4bba6eb0d68780073fe3512 ] The "mlx5_stats_n" in the "struct mlx5_xstats_ctrl" is the number of device stats identified by PMD. Right now, the mapping of device stats to the xstats is not compact. The "input index" of the device stats would remain UINT16_MAX and be skipped when reading counters. If some DPDK stats cannot be identified in the middle of the map, the end condition should be bigger than the "mlx5_stats_n". Or else, some counters would not be read and calculated. Using the global const "xstats_n" as the end condition to traverse the whole array in case some counters are missed. The "xstats_o_idx" should be used instead of the iteration to check if the statistics is an IB device counter. In the meanwhile, adding another field to record the start index of the IB counters to reduce the redundancy iterations. Fixes: a687c3e658c2 ("net/mlx5: fix counters map in bonding mode") Signed-off-by: Bing Zhao Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx5/linux/mlx5_ethdev_os.c | 23 +++++++++++++---------- drivers/net/mlx5/mlx5.h | 5 +++++ 2 files changed, 18 insertions(+), 10 deletions(-) diff --git a/drivers/net/mlx5/linux/mlx5_ethdev_os.c b/drivers/net/mlx5/linux/mlx5_ethdev_os.c index 4f3e790c0b..1d999ef66b 100644 --- a/drivers/net/mlx5/linux/mlx5_ethdev_os.c +++ b/drivers/net/mlx5/linux/mlx5_ethdev_os.c @@ -1292,6 +1292,7 @@ _mlx5_os_read_dev_counters(struct rte_eth_dev *dev, int pf, uint64_t *stats) struct ethtool_stats *et_stats = (struct ethtool_stats *)et_stat_buf; int ret; uint16_t i_idx, o_idx; + uint32_t total_stats = xstats_n; et_stats->cmd = ETHTOOL_GSTATS; /* Pass the maximum value, the driver may ignore this. */ @@ -1309,19 +1310,19 @@ _mlx5_os_read_dev_counters(struct rte_eth_dev *dev, int pf, uint64_t *stats) return ret; } if (pf <= 0) { - for (i = 0; i != xstats_ctrl->mlx5_stats_n; i++) { + for (i = 0; i != total_stats; i++) { i_idx = xstats_ctrl->dev_table_idx[i]; - if (i_idx == UINT16_MAX || xstats_ctrl->info[i].dev) - continue; o_idx = xstats_ctrl->xstats_o_idx[i]; + if (i_idx == UINT16_MAX || xstats_ctrl->info[o_idx].dev) + continue; stats[o_idx] += (uint64_t)et_stats->data[i_idx]; } } else { - for (i = 0; i != xstats_ctrl->mlx5_stats_n; i++) { + for (i = 0; i != total_stats; i++) { i_idx = xstats_ctrl->dev_table_idx_2nd[i]; - if (i_idx == UINT16_MAX) - continue; o_idx = xstats_ctrl->xstats_o_idx_2nd[i]; + if (i_idx == UINT16_MAX || xstats_ctrl->info[o_idx].dev) + continue; stats[o_idx] += (uint64_t)et_stats->data[i_idx]; } } @@ -1364,11 +1365,11 @@ mlx5_os_read_dev_counters(struct rte_eth_dev *dev, bool bond_master, uint64_t *s return ret; } /* - * Read IB counters. - * The counters are unique per IB device but not per net IF. + * Read IB dev counters. + * The counters are unique per IB device but not per netdev IF. * In bonding mode, getting the stats name only from 1 port is enough. */ - for (i = 0; i != xstats_ctrl->mlx5_stats_n; i++) { + for (i = xstats_ctrl->dev_cnt_start; i < xstats_ctrl->mlx5_stats_n; i++) { if (!xstats_ctrl->info[i].dev) continue; /* return last xstats counter if fail to read. */ @@ -1618,7 +1619,7 @@ static const struct mlx5_counter_ctrl mlx5_counters_init[] = { }, }; -static const unsigned int xstats_n = RTE_DIM(mlx5_counters_init); +const unsigned int xstats_n = RTE_DIM(mlx5_counters_init); static int mlx5_os_get_stats_strings(struct rte_eth_dev *dev, bool bond_master, @@ -1664,6 +1665,7 @@ mlx5_os_get_stats_strings(struct rte_eth_dev *dev, bool bond_master, } if (!bond_master) { /* Add dev counters, unique per IB device. */ + xstats_ctrl->dev_cnt_start = xstats_ctrl->mlx5_stats_n; for (j = 0; j != xstats_n; j++) { if (mlx5_counters_init[j].dev) { idx = xstats_ctrl->mlx5_stats_n++; @@ -1705,6 +1707,7 @@ mlx5_os_get_stats_strings(struct rte_eth_dev *dev, bool bond_master, } } /* Dev counters are always at the last now. */ + xstats_ctrl->dev_cnt_start = xstats_ctrl->mlx5_stats_n; for (j = 0; j != xstats_n; j++) { if (mlx5_counters_init[j].dev) { idx = xstats_ctrl->mlx5_stats_n++; diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 1ac8e07d07..0c81bcab9f 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -267,6 +267,8 @@ struct mlx5_xstats_ctrl { uint16_t stats_n_2nd; /* Number of device stats identified by PMD. */ uint16_t mlx5_stats_n; + /* First device counters index. */ + uint16_t dev_cnt_start; /* Index in the device counters table. */ uint16_t dev_table_idx[MLX5_MAX_XSTATS]; /* Index in the output table. */ @@ -281,6 +283,9 @@ struct mlx5_xstats_ctrl { uint16_t xstats_o_idx_2nd[MLX5_MAX_XSTATS]; }; +/* xstats array size. */ +extern const unsigned int xstats_n; + struct mlx5_stats_ctrl { /* Base for imissed counter. */ uint64_t imissed_base; -- 2.34.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2024-08-12 20:44:06.454732586 +0800 +++ 0125-net-mlx5-fix-end-condition-of-reading-xstats.patch 2024-08-12 20:44:02.505069375 +0800 @@ -1 +1 @@ -From 1be61fe1333cd4a8a4bba6eb0d68780073fe3512 Mon Sep 17 00:00:00 2001 +From 07ad92c1a69b27be817a22f7afd590cef0098c6b Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Xueming Li + +[ upstream commit 1be61fe1333cd4a8a4bba6eb0d68780073fe3512 ] @@ -24 +26,0 @@ -Cc: stable@dpdk.org @@ -34 +36 @@ -index 82f651f2f3..5d64984022 100644 +index 4f3e790c0b..1d999ef66b 100644 @@ -37 +39 @@ -@@ -1201,6 +1201,7 @@ _mlx5_os_read_dev_counters(struct rte_eth_dev *dev, int pf, uint64_t *stats) +@@ -1292,6 +1292,7 @@ _mlx5_os_read_dev_counters(struct rte_eth_dev *dev, int pf, uint64_t *stats) @@ -45 +47 @@ -@@ -1218,19 +1219,19 @@ _mlx5_os_read_dev_counters(struct rte_eth_dev *dev, int pf, uint64_t *stats) +@@ -1309,19 +1310,19 @@ _mlx5_os_read_dev_counters(struct rte_eth_dev *dev, int pf, uint64_t *stats) @@ -71 +73 @@ -@@ -1273,11 +1274,11 @@ mlx5_os_read_dev_counters(struct rte_eth_dev *dev, bool bond_master, uint64_t *s +@@ -1364,11 +1365,11 @@ mlx5_os_read_dev_counters(struct rte_eth_dev *dev, bool bond_master, uint64_t *s @@ -86 +88 @@ -@@ -1573,7 +1574,7 @@ static const struct mlx5_counter_ctrl mlx5_counters_init[] = { +@@ -1618,7 +1619,7 @@ static const struct mlx5_counter_ctrl mlx5_counters_init[] = { @@ -95 +97 @@ -@@ -1619,6 +1620,7 @@ mlx5_os_get_stats_strings(struct rte_eth_dev *dev, bool bond_master, +@@ -1664,6 +1665,7 @@ mlx5_os_get_stats_strings(struct rte_eth_dev *dev, bool bond_master, @@ -103 +105 @@ -@@ -1660,6 +1662,7 @@ mlx5_os_get_stats_strings(struct rte_eth_dev *dev, bool bond_master, +@@ -1705,6 +1707,7 @@ mlx5_os_get_stats_strings(struct rte_eth_dev *dev, bool bond_master, @@ -112 +114 @@ -index 75a1e170af..869aac032b 100644 +index 1ac8e07d07..0c81bcab9f 100644 @@ -115 +117 @@ -@@ -281,6 +281,8 @@ struct mlx5_xstats_ctrl { +@@ -267,6 +267,8 @@ struct mlx5_xstats_ctrl { @@ -124 +126 @@ -@@ -295,6 +297,9 @@ struct mlx5_xstats_ctrl { +@@ -281,6 +283,9 @@ struct mlx5_xstats_ctrl {