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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by SJ5PEPF00000203.mail.protection.outlook.com (10.167.244.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7849.8 via Frontend Transport; Mon, 12 Aug 2024 13:03:56 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Mon, 12 Aug 2024 06:03:43 -0700 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Mon, 12 Aug 2024 06:03:42 -0700 From: Xueming Li To: Chengwen Feng CC: , dpdk stable Subject: patch 'dma/hisilicon: remove support for HIP09 platform' has been queued to stable release 23.11.2 Date: Mon, 12 Aug 2024 20:50:16 +0800 Message-ID: <20240812125035.389667-140-xuemingl@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240812125035.389667-1-xuemingl@nvidia.com> References: <20240712110153.309690-23-xuemingl@nvidia.com> <20240812125035.389667-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF00000203:EE_|CH3PR12MB9099:EE_ X-MS-Office365-Filtering-Correlation-Id: 9c5109d1-ed6f-4656-8de8-08dcbacf395a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230040)(36860700013)(1800799024)(82310400026)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Aug 2024 13:03:56.2531 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9c5109d1-ed6f-4656-8de8-08dcbacf395a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF00000203.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB9099 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 23.11.2 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 08/14/24. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging This queued commit can be viewed at: https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=eacf416207f88132c1a51891dddb976ebd740cd5 Thanks. Xueming Li --- >From eacf416207f88132c1a51891dddb976ebd740cd5 Mon Sep 17 00:00:00 2001 From: Chengwen Feng Date: Thu, 4 Jul 2024 02:53:17 +0000 Subject: [PATCH] dma/hisilicon: remove support for HIP09 platform Cc: Xueming Li [ upstream commit 2a3f42942a5f4df62108679ef44a34d21b4a2553 ] The DMA for HIP09 is no longer available, so delete it. Signed-off-by: Chengwen Feng --- doc/guides/dmadevs/hisilicon.rst | 1 - drivers/dma/hisilicon/hisi_dmadev.c | 40 +---------------------------- drivers/dma/hisilicon/hisi_dmadev.h | 35 +------------------------ 3 files changed, 2 insertions(+), 74 deletions(-) diff --git a/doc/guides/dmadevs/hisilicon.rst b/doc/guides/dmadevs/hisilicon.rst index 8c1f0f8886..974bc49376 100644 --- a/doc/guides/dmadevs/hisilicon.rst +++ b/doc/guides/dmadevs/hisilicon.rst @@ -13,7 +13,6 @@ Supported Kunpeng SoCs ---------------------- * Kunpeng 920 -* Kunpeng 930 Device Setup diff --git a/drivers/dma/hisilicon/hisi_dmadev.c b/drivers/dma/hisilicon/hisi_dmadev.c index 0e11ca14cc..4db3b0554c 100644 --- a/drivers/dma/hisilicon/hisi_dmadev.c +++ b/drivers/dma/hisilicon/hisi_dmadev.c @@ -39,8 +39,6 @@ hisi_dma_queue_base(struct hisi_dma_dev *hw) { if (hw->reg_layout == HISI_DMA_REG_LAYOUT_HIP08) return HISI_DMA_HIP08_QUEUE_BASE; - else if (hw->reg_layout == HISI_DMA_REG_LAYOUT_HIP09) - return HISI_DMA_HIP09_QUEUE_BASE; else return 0; } @@ -216,25 +214,6 @@ hisi_dma_init_hw(struct hisi_dma_dev *hw) HISI_DMA_HIP08_QUEUE_INT_MASK_M, true); hisi_dma_update_queue_mbit(hw, HISI_DMA_QUEUE_INT_MASK_REG, HISI_DMA_HIP08_QUEUE_INT_MASK_M, true); - } else if (hw->reg_layout == HISI_DMA_REG_LAYOUT_HIP09) { - hisi_dma_update_queue_mbit(hw, HISI_DMA_QUEUE_CTRL0_REG, - HISI_DMA_HIP09_QUEUE_CTRL0_ERR_ABORT_M, false); - hisi_dma_update_queue_mbit(hw, HISI_DMA_QUEUE_INT_STATUS_REG, - HISI_DMA_HIP09_QUEUE_INT_MASK_M, true); - hisi_dma_update_queue_mbit(hw, HISI_DMA_QUEUE_INT_MASK_REG, - HISI_DMA_HIP09_QUEUE_INT_MASK_M, true); - hisi_dma_update_queue_mbit(hw, - HISI_DMA_HIP09_QUEUE_ERR_INT_STATUS_REG, - HISI_DMA_HIP09_QUEUE_ERR_INT_MASK_M, true); - hisi_dma_update_queue_mbit(hw, - HISI_DMA_HIP09_QUEUE_ERR_INT_MASK_REG, - HISI_DMA_HIP09_QUEUE_ERR_INT_MASK_M, true); - hisi_dma_update_queue_bit(hw, HISI_DMA_QUEUE_CTRL1_REG, - HISI_DMA_HIP09_QUEUE_CTRL1_VA_ENABLE_B, true); - hisi_dma_update_bit(hw, - HISI_DMA_HIP09_QUEUE_CFG_REG(hw->queue_id), - HISI_DMA_HIP09_QUEUE_CFG_LINK_DOWN_MASK_B, - true); } } @@ -256,8 +235,6 @@ hisi_dma_reg_layout(uint8_t revision) { if (revision == HISI_DMA_REVISION_HIP08B) return HISI_DMA_REG_LAYOUT_HIP08; - else if (revision >= HISI_DMA_REVISION_HIP09A) - return HISI_DMA_REG_LAYOUT_HIP09; else return HISI_DMA_REG_LAYOUT_INVALID; } @@ -328,14 +305,11 @@ hisi_dma_info_get(const struct rte_dma_dev *dev, struct rte_dma_info *dev_info, uint32_t info_sz) { - struct hisi_dma_dev *hw = dev->data->dev_private; + RTE_SET_USED(dev); RTE_SET_USED(info_sz); dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM | RTE_DMA_CAPA_OPS_COPY; - if (hw->reg_layout == HISI_DMA_REG_LAYOUT_HIP09) - dev_info->dev_capa |= RTE_DMA_CAPA_HANDLES_ERRORS; - dev_info->max_vchans = 1; dev_info->max_desc = HISI_DMA_MAX_DESC_NUM; dev_info->min_desc = HISI_DMA_MIN_DESC_NUM; @@ -514,18 +488,6 @@ hisi_dma_dump_common(struct hisi_dma_dev *hw, FILE *f) { HISI_DMA_REG_LAYOUT_HIP08, HISI_DMA_HIP08_DUMP_START_REG, HISI_DMA_HIP08_DUMP_END_REG }, - { HISI_DMA_REG_LAYOUT_HIP09, - HISI_DMA_HIP09_DUMP_REGION_A_START_REG, - HISI_DMA_HIP09_DUMP_REGION_A_END_REG }, - { HISI_DMA_REG_LAYOUT_HIP09, - HISI_DMA_HIP09_DUMP_REGION_B_START_REG, - HISI_DMA_HIP09_DUMP_REGION_B_END_REG }, - { HISI_DMA_REG_LAYOUT_HIP09, - HISI_DMA_HIP09_DUMP_REGION_C_START_REG, - HISI_DMA_HIP09_DUMP_REGION_C_END_REG }, - { HISI_DMA_REG_LAYOUT_HIP09, - HISI_DMA_HIP09_DUMP_REGION_D_START_REG, - HISI_DMA_HIP09_DUMP_REGION_D_END_REG }, }; uint32_t i; diff --git a/drivers/dma/hisilicon/hisi_dmadev.h b/drivers/dma/hisilicon/hisi_dmadev.h index 5a17f9f69e..a57b5c759a 100644 --- a/drivers/dma/hisilicon/hisi_dmadev.h +++ b/drivers/dma/hisilicon/hisi_dmadev.h @@ -25,22 +25,14 @@ #define HISI_DMA_DEVICE_ID 0xA122 #define HISI_DMA_PCI_REVISION_ID_REG 0x08 #define HISI_DMA_REVISION_HIP08B 0x21 -#define HISI_DMA_REVISION_HIP09A 0x30 #define HISI_DMA_MAX_HW_QUEUES 4 #define HISI_DMA_MAX_DESC_NUM 8192 #define HISI_DMA_MIN_DESC_NUM 32 -/** - * The HIP08B(HiSilicon IP08) and HIP09B(HiSilicon IP09) are DMA iEPs, they - * have the same pci device id but different pci revision. - * Unfortunately, they have different register layouts, so two layout - * enumerations are defined. - */ enum { HISI_DMA_REG_LAYOUT_INVALID = 0, - HISI_DMA_REG_LAYOUT_HIP08, - HISI_DMA_REG_LAYOUT_HIP09 + HISI_DMA_REG_LAYOUT_HIP08 }; /** @@ -69,9 +61,6 @@ enum { * length of queue-region. The global offset for a single queue register is * calculated by: * offset = queue-base + (queue-id * queue-region) + reg-offset-in-region. - * - * The first part of queue region is basically the same for HIP08 and HIP09 - * register layouts, therefore, HISI_QUEUE_* registers are defined for it. */ #define HISI_DMA_QUEUE_SQ_BASE_L_REG 0x0 #define HISI_DMA_QUEUE_SQ_BASE_H_REG 0x4 @@ -110,28 +99,6 @@ enum { #define HISI_DMA_HIP08_DUMP_START_REG 0x2000 #define HISI_DMA_HIP08_DUMP_END_REG 0x2280 -/** - * HiSilicon IP09 DMA register and field define: - */ -#define HISI_DMA_HIP09_QUEUE_BASE 0x2000 -#define HISI_DMA_HIP09_QUEUE_CTRL0_ERR_ABORT_M GENMASK(31, 28) -#define HISI_DMA_HIP09_QUEUE_CTRL1_VA_ENABLE_B 2 -#define HISI_DMA_HIP09_QUEUE_INT_MASK_M 0x1 -#define HISI_DMA_HIP09_QUEUE_ERR_INT_STATUS_REG 0x48 -#define HISI_DMA_HIP09_QUEUE_ERR_INT_MASK_REG 0x4C -#define HISI_DMA_HIP09_QUEUE_ERR_INT_MASK_M GENMASK(18, 1) -#define HISI_DMA_HIP09_QUEUE_CFG_REG(queue_id) (0x800 + \ - (queue_id) * 0x20) -#define HISI_DMA_HIP09_QUEUE_CFG_LINK_DOWN_MASK_B 16 -#define HISI_DMA_HIP09_DUMP_REGION_A_START_REG 0x0 -#define HISI_DMA_HIP09_DUMP_REGION_A_END_REG 0x368 -#define HISI_DMA_HIP09_DUMP_REGION_B_START_REG 0x800 -#define HISI_DMA_HIP09_DUMP_REGION_B_END_REG 0xA08 -#define HISI_DMA_HIP09_DUMP_REGION_C_START_REG 0x1800 -#define HISI_DMA_HIP09_DUMP_REGION_C_END_REG 0x1A4C -#define HISI_DMA_HIP09_DUMP_REGION_D_START_REG 0x1C00 -#define HISI_DMA_HIP09_DUMP_REGION_D_END_REG 0x1CC4 - /** * In fact, there are multiple states, but it need to pay attention to * the following three states for the driver: -- 2.34.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2024-08-12 20:44:06.895264451 +0800 +++ 0139-dma-hisilicon-remove-support-for-HIP09-platform.patch 2024-08-12 20:44:02.555069385 +0800 @@ -1 +1 @@ -From 2a3f42942a5f4df62108679ef44a34d21b4a2553 Mon Sep 17 00:00:00 2001 +From eacf416207f88132c1a51891dddb976ebd740cd5 Mon Sep 17 00:00:00 2001 @@ -4,0 +5 @@ +Cc: Xueming Li @@ -6 +7 @@ -The DMA for HIP09 is no longer available, so delete it. +[ upstream commit 2a3f42942a5f4df62108679ef44a34d21b4a2553 ] @@ -8 +9 @@ -Cc: stable@dpdk.org +The DMA for HIP09 is no longer available, so delete it. @@ -12,5 +13,4 @@ - doc/guides/dmadevs/hisilicon.rst | 1 - - doc/guides/rel_notes/release_24_07.rst | 5 ++++ - drivers/dma/hisilicon/hisi_dmadev.c | 40 +------------------------- - drivers/dma/hisilicon/hisi_dmadev.h | 35 +--------------------- - 4 files changed, 7 insertions(+), 74 deletions(-) + doc/guides/dmadevs/hisilicon.rst | 1 - + drivers/dma/hisilicon/hisi_dmadev.c | 40 +---------------------------- + drivers/dma/hisilicon/hisi_dmadev.h | 35 +------------------------ + 3 files changed, 2 insertions(+), 74 deletions(-) @@ -30,16 +29,0 @@ -diff --git a/doc/guides/rel_notes/release_24_07.rst b/doc/guides/rel_notes/release_24_07.rst -index 058609b0f3..eb2ed1a55f 100644 ---- a/doc/guides/rel_notes/release_24_07.rst -+++ b/doc/guides/rel_notes/release_24_07.rst -@@ -204,6 +204,11 @@ Removed Items - BPF is not supported and the librte-bpf test fails on 32-bit x86 kernels. - So disable the library and the pmd. - -+* **Removed hisilicon DMA support for HIP09 platform.** -+ -+ The DMA for HIP09 is no longer available, -+ so the support is removed from hisilicon driver for HIP09 platform. -+ - - API Changes - ----------- @@ -47 +31 @@ -index e96bc1d654..7cd6ebc1e0 100644 +index 0e11ca14cc..4db3b0554c 100644 @@ -94 +78 @@ -@@ -327,14 +304,11 @@ hisi_dma_info_get(const struct rte_dma_dev *dev, +@@ -328,14 +305,11 @@ hisi_dma_info_get(const struct rte_dma_dev *dev, @@ -110 +94 @@ -@@ -513,18 +487,6 @@ hisi_dma_dump_common(struct hisi_dma_dev *hw, FILE *f) +@@ -514,18 +488,6 @@ hisi_dma_dump_common(struct hisi_dma_dev *hw, FILE *f)