From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 24E8A45845 for ; Thu, 22 Aug 2024 12:51:06 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BD72342ED2; Thu, 22 Aug 2024 12:51:05 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by mails.dpdk.org (Postfix) with ESMTP id B352942EC1; Thu, 22 Aug 2024 12:50:59 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1724323860; x=1755859860; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nencafhC2QsLnsdal1cSj2ubAZKY3+Vy4ATV/LRbHHk=; b=lzne3mERLDVg4X0FajzfyHJWjxq1WiKGRshYw3yZuIZsWXJpLl4tJbwf UXQwAeaf3nLYP+Ge9JwMPWb9/nwlcYPFDtnaviY9zjOzkSGPIcl4G62V+ Ce33o094Cz03faTsOrnn4bYyuMNOE3AhNQbR1Z5++tbj5N9XOOn8tF4K4 lRTfUTOXmlgTNZJ2TJR1HHOO1BPl4ERCh2hqvvcG5cnVS249Z3+wAHY6M c7tLH0IIkSpBGrJ18vNmpKsWebM7H09GLE3eYqTJ6//2GH7ERifA9uMXZ iPiLb23dOhmjg47OVIP4MhcOSzRvPV3XcK1wEouC8IldTqzZniycG5juT Q==; X-CSE-ConnectionGUID: /GDJyzn5SlqDh9uxb402GQ== X-CSE-MsgGUID: oLzmcQqLSGKTCsTmy+Ik/w== X-IronPort-AV: E=McAfee;i="6700,10204,11171"; a="22542275" X-IronPort-AV: E=Sophos;i="6.10,166,1719903600"; d="scan'208";a="22542275" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Aug 2024 03:50:59 -0700 X-CSE-ConnectionGUID: KRlBj0uURSGqEDTQgob8Lw== X-CSE-MsgGUID: dc3bwvlKQzy+Jekl6CqxiA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,166,1719903600"; d="scan'208";a="61559746" Received: from unknown (HELO npf-hyd-clx-03..) ([10.145.170.182]) by fmviesa010.fm.intel.com with ESMTP; 22 Aug 2024 03:50:57 -0700 From: Soumyadeep Hore To: bruce.richardson@intel.com, ian.stokes@intel.com, aman.deep.singh@intel.com Cc: dev@dpdk.org, shaiq.wani@intel.com, stable@dpdk.org Subject: [PATCH v1 07/12] net/ice: fix link speed for 200G Date: Thu, 22 Aug 2024 09:56:07 +0000 Message-ID: <20240822095612.216214-8-soumyadeep.hore@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240822095612.216214-1-soumyadeep.hore@intel.com> References: <20240822095612.216214-1-soumyadeep.hore@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org When setting PHY configuration during driver initialization, 200G link speed is not being advertised even when the PHY is capable. This is because the get PHY capabilities link speed response is being masked by ICE_AQ_LINK_SPEED_M, which does not include 200G link speed bit. Fixes: d13ad9cf1721 ("net/ice/base: add helper functions for PHY caching") Cc: stable@dpdk.org Signed-off-by: Soumyadeep Hore --- drivers/net/ice/base/ice_adminq_cmd.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h index 6a89e1614a..3ec207927b 100644 --- a/drivers/net/ice/base/ice_adminq_cmd.h +++ b/drivers/net/ice/base/ice_adminq_cmd.h @@ -1624,7 +1624,7 @@ struct ice_aqc_get_link_status_data { #define ICE_AQ_LINK_PWR_QSFP_CLASS_3 2 #define ICE_AQ_LINK_PWR_QSFP_CLASS_4 3 __le16 link_speed; -#define ICE_AQ_LINK_SPEED_M 0x7FF +#define ICE_AQ_LINK_SPEED_M 0xFFF #define ICE_AQ_LINK_SPEED_10MB BIT(0) #define ICE_AQ_LINK_SPEED_100MB BIT(1) #define ICE_AQ_LINK_SPEED_1000MB BIT(2) -- 2.43.0