From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0EEC545804 for ; Fri, 23 Aug 2024 18:23:55 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 097CD4336F; Fri, 23 Aug 2024 18:23:55 +0200 (CEST) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mails.dpdk.org (Postfix) with ESMTP id 399AD4339B for ; Fri, 23 Aug 2024 18:23:53 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1724430232; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=m6JwlPjHCqPCpJrelyQx25JehDFv8x/wR8JKTy3GTtY=; b=T5hODSLU/KOSjKUb0pYIzU0KwZy2fEjckHN+DcBDGjVyZkDNcfibfonNmKDQWwtLRmLd/n Ufb+NEKh/k2LnSTgQh7p0cTreRo6K5DcMZOvts204s9+ev75gwGicCsMYL1Nl6m8X/lG91 RH9bSzgR/pun/cAeoHKcKEClx45PyHo= Received: from mx-prod-mc-05.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-140-rj5DP1lvMUuqUT_JqcpACA-1; Fri, 23 Aug 2024 12:23:51 -0400 X-MC-Unique: rj5DP1lvMUuqUT_JqcpACA-1 Received: from mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.17]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 9DFFE19560A3; Fri, 23 Aug 2024 16:23:50 +0000 (UTC) Received: from rh.redhat.com (unknown [10.39.193.224]) by mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 14F571955F44; Fri, 23 Aug 2024 16:23:48 +0000 (UTC) From: Kevin Traynor To: Chengwen Feng Cc: Jie Hai , dpdk stable Subject: patch 'net/hns3: check Rx DMA address alignmnent' has been queued to stable release 21.11.8 Date: Fri, 23 Aug 2024 17:19:10 +0100 Message-ID: <20240823161929.1004778-122-ktraynor@redhat.com> In-Reply-To: <20240823161929.1004778-1-ktraynor@redhat.com> References: <20240823161929.1004778-1-ktraynor@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="US-ASCII"; x-default=true X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 21.11.8 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 08/28/24. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/kevintraynor/dpdk-stable This queued commit can be viewed at: https://github.com/kevintraynor/dpdk-stable/commit/33f771755cb25aa80ecf4c3bf663be5165d87157 Thanks. Kevin --- >From 33f771755cb25aa80ecf4c3bf663be5165d87157 Mon Sep 17 00:00:00 2001 From: Chengwen Feng Date: Mon, 15 Jul 2024 10:04:39 +0800 Subject: [PATCH] net/hns3: check Rx DMA address alignmnent [ upstream commit d14c995b775a9b5910c51c3ab3685b320736f3f6 ] The network engine has Rx DMA address align requirement, if this requirement is violated, the Rx function will be abnormal. The detail requirement is: 1) For HIP08 platform, require 64-bytes alignment. 2) For later platform, require 128-bytes alignment. The setup Rx DMA address exists both on the control and data plane, to ensure performance, the alignment check is added only on the control plane. Fixes: bba636698316 ("net/hns3: support Rx/Tx and related operations") Signed-off-by: Chengwen Feng Signed-off-by: Jie Hai --- drivers/net/hns3/hns3_ethdev.c | 2 ++ drivers/net/hns3/hns3_ethdev.h | 8 ++++++++ drivers/net/hns3/hns3_ethdev_vf.c | 2 ++ drivers/net/hns3/hns3_rxtx.c | 21 +++++++++++++++++++++ 4 files changed, 33 insertions(+) diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index 98241d740b..250ef7a5a3 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -2759,4 +2759,5 @@ hns3_get_capability(struct hns3_hw *hw) hw->udp_cksum_mode = HNS3_SPECIAL_PORT_SW_CKSUM_MODE; pf->support_multi_tc_pause = false; + hw->rx_dma_addr_align = HNS3_RX_DMA_ADDR_ALIGN_64; return 0; } @@ -2779,4 +2780,5 @@ hns3_get_capability(struct hns3_hw *hw) hw->udp_cksum_mode = HNS3_SPECIAL_PORT_HW_CKSUM_MODE; pf->support_multi_tc_pause = true; + hw->rx_dma_addr_align = HNS3_RX_DMA_ADDR_ALIGN_128; return 0; diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h index 4476251d7d..84d5754a70 100644 --- a/drivers/net/hns3/hns3_ethdev.h +++ b/drivers/net/hns3/hns3_ethdev.h @@ -490,4 +490,7 @@ struct hns3_queue_intr { #define HNS3_PKTS_DROP_STATS_MODE2 1 +#define HNS3_RX_DMA_ADDR_ALIGN_128 128 +#define HNS3_RX_DMA_ADDR_ALIGN_64 64 + struct hns3_hw { struct rte_eth_dev_data *data; @@ -559,4 +562,9 @@ struct hns3_hw { */ uint8_t min_tx_pkt_len; + /* + * The required alignment of the DMA address of the RX buffer. + * See HNS3_RX_DMA_ADDR_ALIGN_XXX for available values. + */ + uint16_t rx_dma_addr_align; struct hns3_queue_intr intr; diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c index cf7f947f3b..5632d6618c 100644 --- a/drivers/net/hns3/hns3_ethdev_vf.c +++ b/drivers/net/hns3/hns3_ethdev_vf.c @@ -788,4 +788,5 @@ hns3vf_get_capability(struct hns3_hw *hw) hw->rss_info.ipv6_sctp_offload_supported = false; hw->promisc_mode = HNS3_UNLIMIT_PROMISC_MODE; + hw->rx_dma_addr_align = HNS3_RX_DMA_ADDR_ALIGN_64; return 0; } @@ -805,4 +806,5 @@ hns3vf_get_capability(struct hns3_hw *hw) hw->rss_info.ipv6_sctp_offload_supported = true; hw->promisc_mode = HNS3_LIMIT_PROMISC_MODE; + hw->rx_dma_addr_align = HNS3_RX_DMA_ADDR_ALIGN_128; return 0; diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c index cbd09e69d0..7f5aa7600d 100644 --- a/drivers/net/hns3/hns3_rxtx.c +++ b/drivers/net/hns3/hns3_rxtx.c @@ -274,4 +274,18 @@ hns3_free_all_queues(struct rte_eth_dev *dev) } +static int +hns3_check_rx_dma_addr(struct hns3_hw *hw, uint64_t dma_addr) +{ + uint64_t rem; + + rem = dma_addr & (hw->rx_dma_addr_align - 1); + if (rem > 0) { + hns3_err(hw, "The IO address of the beginning of the mbuf data " + "must be %u-byte aligned", hw->rx_dma_addr_align); + return -EINVAL; + } + return 0; +} + static int hns3_alloc_rx_queue_mbufs(struct hns3_hw *hw, struct hns3_rx_queue *rxq) @@ -280,4 +294,5 @@ hns3_alloc_rx_queue_mbufs(struct hns3_hw *hw, struct hns3_rx_queue *rxq) uint64_t dma_addr; uint16_t i; + int ret; for (i = 0; i < rxq->nb_rx_desc; i++) { @@ -300,4 +315,10 @@ hns3_alloc_rx_queue_mbufs(struct hns3_hw *hw, struct hns3_rx_queue *rxq) rxq->rx_ring[i].addr = dma_addr; rxq->rx_ring[i].rx.bd_base_info = 0; + + ret = hns3_check_rx_dma_addr(hw, dma_addr); + if (ret != 0) { + hns3_rx_queue_release_mbufs(rxq); + return ret; + } } -- 2.46.0 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2024-08-23 17:18:13.381300372 +0100 +++ 0122-net-hns3-check-Rx-DMA-address-alignmnent.patch 2024-08-23 17:18:09.885430682 +0100 @@ -1 +1 @@ -From d14c995b775a9b5910c51c3ab3685b320736f3f6 Mon Sep 17 00:00:00 2001 +From 33f771755cb25aa80ecf4c3bf663be5165d87157 Mon Sep 17 00:00:00 2001 @@ -5,0 +6,2 @@ +[ upstream commit d14c995b775a9b5910c51c3ab3685b320736f3f6 ] + @@ -17 +18,0 @@ -Cc: stable@dpdk.org @@ -29 +30 @@ -index 327f6fe908..ec1251cb7e 100644 +index 98241d740b..250ef7a5a3 100644 @@ -32 +33 @@ -@@ -2739,4 +2739,5 @@ hns3_get_capability(struct hns3_hw *hw) +@@ -2759,4 +2759,5 @@ hns3_get_capability(struct hns3_hw *hw) @@ -38 +39 @@ -@@ -2759,4 +2760,5 @@ hns3_get_capability(struct hns3_hw *hw) +@@ -2779,4 +2780,5 @@ hns3_get_capability(struct hns3_hw *hw) @@ -45 +46 @@ -index a6b652455b..799b61038a 100644 +index 4476251d7d..84d5754a70 100644 @@ -48 +49 @@ -@@ -488,4 +488,7 @@ struct hns3_queue_intr { +@@ -490,4 +490,7 @@ struct hns3_queue_intr { @@ -56 +57 @@ -@@ -555,4 +558,9 @@ struct hns3_hw { +@@ -559,4 +562,9 @@ struct hns3_hw { @@ -67 +68 @@ -index b83d5b9589..ea9225cd26 100644 +index cf7f947f3b..5632d6618c 100644 @@ -70 +71 @@ -@@ -708,4 +708,5 @@ hns3vf_get_capability(struct hns3_hw *hw) +@@ -788,4 +788,5 @@ hns3vf_get_capability(struct hns3_hw *hw) @@ -76 +77 @@ -@@ -725,4 +726,5 @@ hns3vf_get_capability(struct hns3_hw *hw) +@@ -805,4 +806,5 @@ hns3vf_get_capability(struct hns3_hw *hw) @@ -83 +84 @@ -index d7f9cff547..5941b966e0 100644 +index cbd09e69d0..7f5aa7600d 100644