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From: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
To: dev@dpdk.org
Cc: david.marchand@redhat.com, stable@dpdk.org
Subject: [PATCH] fib6: add runtime checks for vector lookup
Date: Tue,  8 Oct 2024 17:31:36 +0000	[thread overview]
Message-ID: <20241008173136.441340-1-vladimir.medvedkin@intel.com> (raw)

AVX512 lookup function requires CPU to support RTE_CPUFLAG_AVX512DQ and
RTE_CPUFLAG_AVX512BW. Add runtime checks of these two flags when deciding
if vector function can be used.

Fixes: c3e12e0f0354 ("fib: add dataplane algorithm for IPv6")
Cc: stable@dpdk.org

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
---
 lib/fib/trie.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/lib/fib/trie.c b/lib/fib/trie.c
index 09470e7287..805e21d090 100644
--- a/lib/fib/trie.c
+++ b/lib/fib/trie.c
@@ -47,6 +47,8 @@ get_vector_fn(enum rte_fib_trie_nh_sz nh_sz)
 {
 #ifdef CC_TRIE_AVX512_SUPPORT
 	if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) <= 0) ||
+		(rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512DQ) <= 0) ||
+		(rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) <= 0) ||
 			(rte_vect_get_max_simd_bitwidth() < RTE_VECT_SIMD_512))
 		return NULL;
 	switch (nh_sz) {
-- 
2.34.1


             reply	other threads:[~2024-10-08 17:31 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-08 17:31 Vladimir Medvedkin [this message]
2024-10-11  9:29 ` David Marchand

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