From: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
To: <stable@dpdk.org>
Cc: <bluca@debian.org>, Dariusz Sosnowski <dsosnowski@nvidia.com>
Subject: [PATCH 22.11 1/3] net/mlx5: update flex parser arc types support
Date: Thu, 31 Oct 2024 14:44:32 +0200 [thread overview]
Message-ID: <20241031124434.1751097-1-viacheslavo@nvidia.com> (raw)
[ upstream commit 6dfb83f13f7a6d259e4ecd3d53d40b9ed87e2fe1 ]
Add support for input IPv4 and for ESP output flex parser arcs.
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
---
drivers/net/mlx5/mlx5_flow_flex.c | 40 +++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/drivers/net/mlx5/mlx5_flow_flex.c b/drivers/net/mlx5/mlx5_flow_flex.c
index fb08910ddb..b63441b199 100644
--- a/drivers/net/mlx5/mlx5_flow_flex.c
+++ b/drivers/net/mlx5/mlx5_flow_flex.c
@@ -1006,6 +1006,8 @@ mlx5_flex_arc_type(enum rte_flow_item_type type, int in)
return MLX5_GRAPH_ARC_NODE_GENEVE;
case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
return MLX5_GRAPH_ARC_NODE_VXLAN_GPE;
+ case RTE_FLOW_ITEM_TYPE_ESP:
+ return MLX5_GRAPH_ARC_NODE_IPSEC_ESP;
default:
return -EINVAL;
}
@@ -1043,6 +1045,38 @@ mlx5_flex_arc_in_udp(const struct rte_flow_item *item,
return rte_be_to_cpu_16(spec->hdr.dst_port);
}
+static int
+mlx5_flex_arc_in_ipv4(const struct rte_flow_item *item,
+ struct rte_flow_error *error)
+{
+ const struct rte_flow_item_ipv4 *spec = item->spec;
+ const struct rte_flow_item_ipv4 *mask = item->mask;
+ struct rte_flow_item_ipv4 ip = { .hdr.next_proto_id = 0xff };
+
+ if (memcmp(mask, &ip, sizeof(struct rte_flow_item_ipv4))) {
+ return rte_flow_error_set
+ (error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, item,
+ "invalid ipv4 item mask, full mask is desired");
+ }
+ return spec->hdr.next_proto_id;
+}
+
+static int
+mlx5_flex_arc_in_ipv6(const struct rte_flow_item *item,
+ struct rte_flow_error *error)
+{
+ const struct rte_flow_item_ipv6 *spec = item->spec;
+ const struct rte_flow_item_ipv6 *mask = item->mask;
+ struct rte_flow_item_ipv6 ip = { .hdr.proto = 0xff };
+
+ if (memcmp(mask, &ip, sizeof(struct rte_flow_item_ipv6))) {
+ return rte_flow_error_set
+ (error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, item,
+ "invalid ipv6 item mask, full mask is desired");
+ }
+ return spec->hdr.proto;
+}
+
static int
mlx5_flex_translate_arc_in(struct mlx5_hca_flex_attr *attr,
const struct rte_flow_item_flex_conf *conf,
@@ -1089,6 +1123,12 @@ mlx5_flex_translate_arc_in(struct mlx5_hca_flex_attr *attr,
case RTE_FLOW_ITEM_TYPE_UDP:
ret = mlx5_flex_arc_in_udp(rte_item, error);
break;
+ case RTE_FLOW_ITEM_TYPE_IPV4:
+ ret = mlx5_flex_arc_in_ipv4(rte_item, error);
+ break;
+ case RTE_FLOW_ITEM_TYPE_IPV6:
+ ret = mlx5_flex_arc_in_ipv6(rte_item, error);
+ break;
default:
MLX5_ASSERT(false);
return rte_flow_error_set
--
2.34.1
next reply other threads:[~2024-10-31 12:45 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-31 12:44 Viacheslav Ovsiienko [this message]
2024-10-31 12:44 ` [PATCH 22.11 2/3] net/mlx5: fix non full word sample fields in flex item Viacheslav Ovsiienko
2024-10-31 12:44 ` [PATCH 22.11 3/3] net/mlx5: fix flex item header length field translation Viacheslav Ovsiienko
2024-10-31 14:34 ` Luca Boccassi
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