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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230040)(376014)(36860700013)(82310400026)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2024 13:51:39.5591 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c4fbea58-4cb2-408a-d24b-08dd03ea4c7f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB73.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB6970 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Use the information from the CQE, not from the title packet, for getting the number of miniCQEs in the compressed CQEs array. This way we can avoid segfaults in the rxq_cq_decompress_v() in case of mbuf corruption (due to double mbuf free, for example). Fixes: 6cb559d67b ("net/mlx5: add vectorized Rx/Tx burst for x86") Signed-off-by: Alexander Kozyrev Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_rxtx_vec_altivec.h | 3 +-- drivers/net/mlx5/mlx5_rxtx_vec_neon.h | 3 +-- drivers/net/mlx5/mlx5_rxtx_vec_sse.h | 3 +-- 3 files changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h index b2bbc4ba17..ec827368e6 100644 --- a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h +++ b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h @@ -98,8 +98,7 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, 11, 10, 9, 8}; /* bswap32, rss */ /* Restore the compressed count. Must be 16 bits. */ uint16_t mcqe_n = (rxq->cqe_comp_layout) ? - (MLX5_CQE_NUM_MINIS(cq->op_own) + 1) : - t_pkt->data_len + (rxq->crc_present * RTE_ETHER_CRC_LEN); + (MLX5_CQE_NUM_MINIS(cq->op_own) + 1U) : rte_be_to_cpu_32(cq->byte_cnt); uint16_t pkts_n = mcqe_n; const __vector unsigned char rearm = (__vector unsigned char)vec_vsx_ld(0, diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h index 0ce9827ed9..b60226ddeb 100644 --- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h +++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h @@ -98,8 +98,7 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, }; /* Restore the compressed count. Must be 16 bits. */ uint16_t mcqe_n = (rxq->cqe_comp_layout) ? - (MLX5_CQE_NUM_MINIS(cq->op_own) + 1) : - t_pkt->data_len + (rxq->crc_present * RTE_ETHER_CRC_LEN); + (MLX5_CQE_NUM_MINIS(cq->op_own) + 1U) : rte_be_to_cpu_32(cq->byte_cnt); uint16_t pkts_n = mcqe_n; const uint64x2_t rearm = vld1q_u64((void *)&t_pkt->rearm_data); diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h index e71d6c303f..0273fdb54a 100644 --- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h +++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h @@ -96,8 +96,7 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, -1, -1, -1, -1 /* skip packet_type */); /* Restore the compressed count. Must be 16 bits. */ uint16_t mcqe_n = (rxq->cqe_comp_layout) ? - (MLX5_CQE_NUM_MINIS(cq->op_own) + 1) : - t_pkt->data_len + (rxq->crc_present * RTE_ETHER_CRC_LEN); + (MLX5_CQE_NUM_MINIS(cq->op_own) + 1U) : rte_be_to_cpu_32(cq->byte_cnt); uint16_t pkts_n = mcqe_n; const __m128i rearm = _mm_loadu_si128((__m128i *)&t_pkt->rearm_data); -- 2.43.5