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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CY4PEPF0000E9D8.mail.protection.outlook.com (10.167.241.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8230.7 via Frontend Transport; Sat, 7 Dec 2024 08:02:52 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sat, 7 Dec 2024 00:02:41 -0800 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sat, 7 Dec 2024 00:02:39 -0800 From: Xueming Li To: Gregory Etelson CC: Xueming Li , Dariusz Sosnowski , dpdk stable Subject: patch 'net/mlx5: fix SQ flow item size' has been queued to stable release 23.11.3 Date: Sat, 7 Dec 2024 15:59:34 +0800 Message-ID: <20241207080055.488538-17-xuemingl@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241207080055.488538-1-xuemingl@nvidia.com> References: <20241111062847.216344-122-xuemingl@nvidia.com> <20241207080055.488538-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D8:EE_|IA0PR12MB8716:EE_ X-MS-Office365-Filtering-Correlation-Id: 84d6a118-ab88-4e69-ee6f-08dd16958cae X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230040)(376014)(36860700013)(1800799024)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Dec 2024 08:02:52.2066 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 84d6a118-ab88-4e69-ee6f-08dd16958cae X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D8.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8716 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 23.11.3 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 12/10/24. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging This queued commit can be viewed at: https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=5599cdc9f1b9c33585531c4d0c4e0a99219fae1f Thanks. Xueming Li --- >From 5599cdc9f1b9c33585531c4d0c4e0a99219fae1f Mon Sep 17 00:00:00 2001 From: Gregory Etelson Date: Sun, 27 Oct 2024 16:09:40 +0200 Subject: [PATCH] net/mlx5: fix SQ flow item size Cc: Xueming Li [ upstream commit 7c66fa49ddcce1981c2fa3a0c024ec82b036639c ] Expand the size of struct mlx5_rte_flow_item_sq to 64 bits on 64-bit systems. This aligns with DPDK's assumption that PMD private data has pointer size when copying flow items with rte_flow_conv.[1] Previously, the struct was defined as 32 bits, causing DPDK to incorrectly assign an additional 32 bits when copying MLX5_RTE_FLOW_ITEM_TYPE_SQ items on 64-bit systems. This fix ensures proper memory alignment and prevents potential buffer overflows when DPDK copies MLX5_RTE_FLOW_ITEM_TYPE_SQ items. [1]: commit 6cf72047332b ("ethdev: support flow elements with variable length") Fixes: 75a00812b18f ("net/mlx5: add hardware steering item translation") Signed-off-by: Gregory Etelson Acked-by: Dariusz Sosnowski --- drivers/net/mlx5/mlx5_flow.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index bde7dc43a8..e6b0c1bb80 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -157,6 +157,9 @@ struct mlx5_flow_action_copy_mreg { /* Matches on source queue. */ struct mlx5_rte_flow_item_sq { uint32_t queue; /* DevX SQ number */ +#ifdef RTE_ARCH_64 + uint32_t reserved; +#endif }; /* Feature name to allocate metadata register. */ -- 2.34.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2024-12-06 23:26:44.688173719 +0800 +++ 0016-net-mlx5-fix-SQ-flow-item-size.patch 2024-12-06 23:26:43.883044829 +0800 @@ -1 +1 @@ -From 7c66fa49ddcce1981c2fa3a0c024ec82b036639c Mon Sep 17 00:00:00 2001 +From 5599cdc9f1b9c33585531c4d0c4e0a99219fae1f Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Xueming Li + +[ upstream commit 7c66fa49ddcce1981c2fa3a0c024ec82b036639c ] @@ -21 +23,0 @@ -Cc: stable@dpdk.org @@ -30 +32 @@ -index 9a8eccdd25..f5866af231 100644 +index bde7dc43a8..e6b0c1bb80 100644 @@ -33 +35 @@ -@@ -168,6 +168,9 @@ struct mlx5_flow_action_copy_mreg { +@@ -157,6 +157,9 @@ struct mlx5_flow_action_copy_mreg { @@ -42 +44 @@ - /* Map from registers to modify fields. */ + /* Feature name to allocate metadata register. */