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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BL02EPF00021F68.mail.protection.outlook.com (10.167.249.4) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8230.7 via Frontend Transport; Sat, 7 Dec 2024 08:07:49 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sat, 7 Dec 2024 00:07:31 -0800 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sat, 7 Dec 2024 00:07:29 -0800 From: Xueming Li To: Erez Shitrit CC: Xueming Li , Bing Zhao , "Dariusz Sosnowski" , dpdk stable Subject: patch 'net/mlx5/hws: fix allocation of STCs' has been queued to stable release 23.11.3 Date: Sat, 7 Dec 2024 16:00:27 +0800 Message-ID: <20241207080055.488538-70-xuemingl@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241207080055.488538-1-xuemingl@nvidia.com> References: <20241111062847.216344-122-xuemingl@nvidia.com> <20241207080055.488538-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00021F68:EE_|PH7PR12MB9222:EE_ X-MS-Office365-Filtering-Correlation-Id: c52bb4a5-c212-456e-dfbe-08dd16963dea X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(376014)(1800799024)(36860700013)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Dec 2024 08:07:49.3999 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c52bb4a5-c212-456e-dfbe-08dd16963dea X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F68.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB9222 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 23.11.3 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 12/10/24. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging This queued commit can be viewed at: https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=006ec58ed75610a681ad97cd5364d28e6f5c908c Thanks. Xueming Li --- >From 006ec58ed75610a681ad97cd5364d28e6f5c908c Mon Sep 17 00:00:00 2001 From: Erez Shitrit Date: Tue, 29 Oct 2024 15:24:03 +0200 Subject: [PATCH] net/mlx5/hws: fix allocation of STCs Cc: Xueming Li [ upstream commit 691326d15da263d068de71c468c74c225c4f75c3 ] STC is a limited resource of the HW, and might get consumed till no more contexts can be opened. So, let the user to define the size of how many STCs to allocate per context. In case the user has many representors, no need to allocate per each of them the default value of STCs, otherwise after a certain numbers of representors no more STC's will remain in the system. Fixes: b0290e56dd08 ("net/mlx5/hws: add context object") Signed-off-by: Erez Shitrit Signed-off-by: Bing Zhao Acked-by: Dariusz Sosnowski --- drivers/net/mlx5/hws/mlx5dr.h | 4 +++- drivers/net/mlx5/hws/mlx5dr_context.c | 9 ++++++--- drivers/net/mlx5/mlx5_flow.h | 3 +++ drivers/net/mlx5/mlx5_flow_hw.c | 3 +++ 4 files changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h index f003d9f446..cbb79b8ba1 100644 --- a/drivers/net/mlx5/hws/mlx5dr.h +++ b/drivers/net/mlx5/hws/mlx5dr.h @@ -96,8 +96,10 @@ struct mlx5dr_context_attr { uint16_t queues; uint16_t queue_size; size_t initial_log_ste_memory; /* Currently not in use */ - /* Optional PD used for allocating res ources */ + /* Optional PD used for allocating resources */ struct ibv_pd *pd; + /* Optional the STC array size for that context */ + size_t initial_log_stc_memory; /* Optional other ctx for resources allocation, all objects will be created on it */ struct ibv_context *shared_ibv_ctx; }; diff --git a/drivers/net/mlx5/hws/mlx5dr_context.c b/drivers/net/mlx5/hws/mlx5dr_context.c index 7f120b3b1b..6c4c18b041 100644 --- a/drivers/net/mlx5/hws/mlx5dr_context.c +++ b/drivers/net/mlx5/hws/mlx5dr_context.c @@ -19,7 +19,8 @@ uint8_t mlx5dr_context_get_reparse_mode(struct mlx5dr_context *ctx) return MLX5_IFC_RTC_REPARSE_ALWAYS; } -static int mlx5dr_context_pools_init(struct mlx5dr_context *ctx) +static int mlx5dr_context_pools_init(struct mlx5dr_context *ctx, + struct mlx5dr_context_attr *attr) { struct mlx5dr_pool_attr pool_attr = {0}; uint8_t max_log_sz; @@ -34,7 +35,9 @@ static int mlx5dr_context_pools_init(struct mlx5dr_context *ctx) /* Create an STC pool per FT type */ pool_attr.pool_type = MLX5DR_POOL_TYPE_STC; pool_attr.flags = MLX5DR_POOL_FLAGS_FOR_STC_POOL; - max_log_sz = RTE_MIN(MLX5DR_POOL_STC_LOG_SZ, ctx->caps->stc_alloc_log_max); + if (!attr->initial_log_stc_memory) + attr->initial_log_stc_memory = MLX5DR_POOL_STC_LOG_SZ; + max_log_sz = RTE_MIN(attr->initial_log_stc_memory, ctx->caps->stc_alloc_log_max); pool_attr.alloc_log_sz = RTE_MAX(max_log_sz, ctx->caps->stc_alloc_log_gran); for (i = 0; i < MLX5DR_TABLE_TYPE_MAX; i++) { @@ -172,7 +175,7 @@ static int mlx5dr_context_init_hws(struct mlx5dr_context *ctx, if (ret) return ret; - ret = mlx5dr_context_pools_init(ctx); + ret = mlx5dr_context_pools_init(ctx, attr); if (ret) goto uninit_pd; diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index e6b0c1bb80..afb3c3b72f 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -3011,6 +3011,9 @@ flow_hw_get_ipv6_route_ext_mod_id_from_ctx(void *dr_ctx, uint8_t idx) void mlx5_indirect_list_handles_release(struct rte_eth_dev *dev); #ifdef HAVE_MLX5_HWS_SUPPORT + +#define MLX5_REPR_STC_MEMORY_LOG 11 + struct mlx5_mirror; void mlx5_hw_mirror_destroy(struct rte_eth_dev *dev, struct mlx5_mirror *mirror); diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 0eaf38537a..2437e44051 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -9570,6 +9570,9 @@ flow_hw_configure(struct rte_eth_dev *dev, } dr_ctx_attr.pd = priv->sh->cdev->pd; dr_ctx_attr.queues = nb_q_updated; + /* Assign initial value of STC numbers for representors. */ + if (priv->representor) + dr_ctx_attr.initial_log_stc_memory = MLX5_REPR_STC_MEMORY_LOG; /* Queue size should all be the same. Take the first one. */ dr_ctx_attr.queue_size = _queue_attr[0]->size; if (port_attr->flags & RTE_FLOW_PORT_FLAG_SHARE_INDIRECT) { -- 2.34.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2024-12-06 23:26:46.356378201 +0800 +++ 0069-net-mlx5-hws-fix-allocation-of-STCs.patch 2024-12-06 23:26:44.013044827 +0800 @@ -1 +1 @@ -From 691326d15da263d068de71c468c74c225c4f75c3 Mon Sep 17 00:00:00 2001 +From 006ec58ed75610a681ad97cd5364d28e6f5c908c Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Xueming Li + +[ upstream commit 691326d15da263d068de71c468c74c225c4f75c3 ] @@ -15 +17,0 @@ -Cc: stable@dpdk.org @@ -28 +30 @@ -index 1b58eeb2c7..3668ab9fcf 100644 +index f003d9f446..cbb79b8ba1 100644 @@ -31 +33 @@ -@@ -103,8 +103,10 @@ struct mlx5dr_context_attr { +@@ -96,8 +96,10 @@ struct mlx5dr_context_attr { @@ -42 +44 @@ - bool bwc; /* add support for backward compatible API*/ + }; @@ -44 +46 @@ -index db5e72927a..24741afe58 100644 +index 7f120b3b1b..6c4c18b041 100644 @@ -78 +80 @@ -index 693e07218d..d871b62854 100644 +index e6b0c1bb80..afb3c3b72f 100644 @@ -81 +83 @@ -@@ -3652,6 +3652,9 @@ flow_hw_get_ipv6_route_ext_mod_id_from_ctx(void *dr_ctx, uint8_t idx) +@@ -3011,6 +3011,9 @@ flow_hw_get_ipv6_route_ext_mod_id_from_ctx(void *dr_ctx, uint8_t idx) @@ -92 +94 @@ -index 2a9ef71cd8..c43520ed51 100644 +index 0eaf38537a..2437e44051 100644 @@ -95 +97 @@ -@@ -11825,6 +11825,9 @@ __flow_hw_configure(struct rte_eth_dev *dev, +@@ -9570,6 +9570,9 @@ flow_hw_configure(struct rte_eth_dev *dev,