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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by BL02EPF00021F68.mail.protection.outlook.com (10.167.249.4) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8230.7 via Frontend Transport; Sat, 7 Dec 2024 08:08:33 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sat, 7 Dec 2024 00:08:19 -0800 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sat, 7 Dec 2024 00:08:17 -0800 From: Xueming Li To: Alexander Kozyrev CC: Xueming Li , Viacheslav Ovsiienko , dpdk stable Subject: patch 'net/mlx5: fix miniCQEs number calculation' has been queued to stable release 23.11.3 Date: Sat, 7 Dec 2024 16:00:33 +0800 Message-ID: <20241207080055.488538-76-xuemingl@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241207080055.488538-1-xuemingl@nvidia.com> References: <20241111062847.216344-122-xuemingl@nvidia.com> <20241207080055.488538-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00021F68:EE_|BN5PR12MB9487:EE_ X-MS-Office365-Filtering-Correlation-Id: 58b8bd9b-2684-483e-4cf8-08dd169657f0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230040)(1800799024)(376014)(36860700013)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Dec 2024 08:08:33.0562 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 58b8bd9b-2684-483e-4cf8-08dd169657f0 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F68.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN5PR12MB9487 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 23.11.3 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 12/10/24. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging This queued commit can be viewed at: https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=1ca97699fc3a5459ad9e820fac0ae1d96633b1ee Thanks. Xueming Li --- >From 1ca97699fc3a5459ad9e820fac0ae1d96633b1ee Mon Sep 17 00:00:00 2001 From: Alexander Kozyrev Date: Wed, 13 Nov 2024 15:50:54 +0200 Subject: [PATCH] net/mlx5: fix miniCQEs number calculation Cc: Xueming Li [ upstream commit a7ae9ba1f8c888a7ed546a88a954426477cd24a4 ] Use the information from the CQE, not from the title packet, for getting the number of miniCQEs in the compressed CQEs array. This way we can avoid segfaults in the rxq_cq_decompress_v() in case of mbuf corruption (due to double mbuf free, for example). Fixes: 6cb559d67b83 ("net/mlx5: add vectorized Rx/Tx burst for x86") Signed-off-by: Alexander Kozyrev Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_rxtx_vec_altivec.h | 3 +-- drivers/net/mlx5/mlx5_rxtx_vec_neon.h | 3 +-- drivers/net/mlx5/mlx5_rxtx_vec_sse.h | 3 +-- 3 files changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h index f6e74f4180..efe0db4ca5 100644 --- a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h +++ b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h @@ -96,8 +96,7 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, 11, 10, 9, 8}; /* bswap32, rss */ /* Restore the compressed count. Must be 16 bits. */ uint16_t mcqe_n = (rxq->cqe_comp_layout) ? - (MLX5_CQE_NUM_MINIS(cq->op_own) + 1) : - t_pkt->data_len + (rxq->crc_present * RTE_ETHER_CRC_LEN); + (MLX5_CQE_NUM_MINIS(cq->op_own) + 1U) : rte_be_to_cpu_32(cq->byte_cnt); uint16_t pkts_n = mcqe_n; const __vector unsigned char rearm = (__vector unsigned char)vec_vsx_ld(0, diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h index 942d395dc9..02817a9645 100644 --- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h +++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h @@ -95,8 +95,7 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, }; /* Restore the compressed count. Must be 16 bits. */ uint16_t mcqe_n = (rxq->cqe_comp_layout) ? - (MLX5_CQE_NUM_MINIS(cq->op_own) + 1) : - t_pkt->data_len + (rxq->crc_present * RTE_ETHER_CRC_LEN); + (MLX5_CQE_NUM_MINIS(cq->op_own) + 1U) : rte_be_to_cpu_32(cq->byte_cnt); uint16_t pkts_n = mcqe_n; const uint64x2_t rearm = vld1q_u64((void *)&t_pkt->rearm_data); diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h index fb59c11346..e7271abef6 100644 --- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h +++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h @@ -94,8 +94,7 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, -1, -1, -1, -1 /* skip packet_type */); /* Restore the compressed count. Must be 16 bits. */ uint16_t mcqe_n = (rxq->cqe_comp_layout) ? - (MLX5_CQE_NUM_MINIS(cq->op_own) + 1) : - t_pkt->data_len + (rxq->crc_present * RTE_ETHER_CRC_LEN); + (MLX5_CQE_NUM_MINIS(cq->op_own) + 1U) : rte_be_to_cpu_32(cq->byte_cnt); uint16_t pkts_n = mcqe_n; const __m128i rearm = _mm_loadu_si128((__m128i *)&t_pkt->rearm_data); -- 2.34.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2024-12-06 23:26:46.615555002 +0800 +++ 0075-net-mlx5-fix-miniCQEs-number-calculation.patch 2024-12-06 23:26:44.073044826 +0800 @@ -1 +1 @@ -From a7ae9ba1f8c888a7ed546a88a954426477cd24a4 Mon Sep 17 00:00:00 2001 +From 1ca97699fc3a5459ad9e820fac0ae1d96633b1ee Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Xueming Li + +[ upstream commit a7ae9ba1f8c888a7ed546a88a954426477cd24a4 ] @@ -12 +14,0 @@ -Cc: stable@dpdk.org @@ -23 +25 @@ -index ca614ecf9d..240987d03d 100644 +index f6e74f4180..efe0db4ca5 100644 @@ -26 +28 @@ -@@ -98,8 +98,7 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, +@@ -96,8 +96,7 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, @@ -37 +39 @@ -index 519fff5b2c..dc1d30753d 100644 +index 942d395dc9..02817a9645 100644 @@ -40 +42 @@ -@@ -98,8 +98,7 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, +@@ -95,8 +95,7 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, @@ -51 +53 @@ -index 0a2b67e750..81a177fce7 100644 +index fb59c11346..e7271abef6 100644 @@ -54 +56 @@ -@@ -96,8 +96,7 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, +@@ -94,8 +94,7 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,