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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by BL02EPF00021F6A.mail.protection.outlook.com (10.167.249.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8230.7 via Frontend Transport; Sat, 7 Dec 2024 08:08:41 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sat, 7 Dec 2024 00:08:25 -0800 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sat, 7 Dec 2024 00:08:24 -0800 From: Xueming Li To: Vladimir Medvedkin CC: Xueming Li , Bruce Richardson , dpdk stable Subject: patch 'net/i40e: check register read for outer VLAN' has been queued to stable release 23.11.3 Date: Sat, 7 Dec 2024 16:00:36 +0800 Message-ID: <20241207080055.488538-79-xuemingl@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241207080055.488538-1-xuemingl@nvidia.com> References: <20241111062847.216344-122-xuemingl@nvidia.com> <20241207080055.488538-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00021F6A:EE_|IA1PR12MB6412:EE_ X-MS-Office365-Filtering-Correlation-Id: 9d691ecb-a1b5-49f3-30ed-08dd16965cf0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230040)(36860700013)(376014)(82310400026)(1800799024)(7053199007); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Dec 2024 08:08:41.4597 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9d691ecb-a1b5-49f3-30ed-08dd16965cf0 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F6A.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6412 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 23.11.3 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 12/10/24. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging This queued commit can be viewed at: https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=fc13431853e9c89003bf6262a51b7eb935963852 Thanks. Xueming Li --- >From fc13431853e9c89003bf6262a51b7eb935963852 Mon Sep 17 00:00:00 2001 From: Vladimir Medvedkin Date: Fri, 15 Nov 2024 19:14:25 +0000 Subject: [PATCH] net/i40e: check register read for outer VLAN Cc: Xueming Li [ upstream commit c11c52dd5d2a19c97616ac32a1d4911c48f157d4 ] 'i40e_get_outer_vlan()' does not check 'i40e_aq_debug_read_register()' return value. This patch fixes this issue, by checking the return value and, on error, having the i40e_get_outer_vlan() function return that error back to the caller. This in turn requires a change in the return type of that function and updates to the places where it is called to: * handle the error, and * handle the tpid being returned as an "out" parameter rather than return code. Coverity issue: 445518 Fixes: 86eb05d6350b ("net/i40e: add flow validate function") Signed-off-by: Vladimir Medvedkin Acked-by: Bruce Richardson --- drivers/net/i40e/i40e_flow.c | 77 ++++++++++++++++++++++++++++++------ 1 file changed, 65 insertions(+), 12 deletions(-) diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c index 92165c8422..273cb2d80c 100644 --- a/drivers/net/i40e/i40e_flow.c +++ b/drivers/net/i40e/i40e_flow.c @@ -1263,27 +1263,31 @@ i40e_flow_parse_attr(const struct rte_flow_attr *attr, return 0; } -static uint16_t -i40e_get_outer_vlan(struct rte_eth_dev *dev) +static int +i40e_get_outer_vlan(struct rte_eth_dev *dev, uint16_t *tpid) { struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); int qinq = dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND; uint64_t reg_r = 0; uint16_t reg_id; - uint16_t tpid; + int ret; if (qinq) reg_id = 2; else reg_id = 3; - i40e_aq_debug_read_register(hw, I40E_GL_SWT_L2TAGCTRL(reg_id), + ret = i40e_aq_debug_read_register(hw, I40E_GL_SWT_L2TAGCTRL(reg_id), ®_r, NULL); + if (ret != I40E_SUCCESS) { + PMD_DRV_LOG(ERR, "Failed to read from L2 tag ctrl register [%d]", reg_id); + return -EIO; + } - tpid = (reg_r >> I40E_GL_SWT_L2TAGCTRL_ETHERTYPE_SHIFT) & 0xFFFF; + *tpid = (reg_r >> I40E_GL_SWT_L2TAGCTRL_ETHERTYPE_SHIFT) & 0xFFFF; - return tpid; + return 0; } /* 1. Last in item should be NULL as range is not supported. @@ -1303,6 +1307,8 @@ i40e_flow_parse_ethertype_pattern(struct rte_eth_dev *dev, const struct rte_flow_item_eth *eth_spec; const struct rte_flow_item_eth *eth_mask; enum rte_flow_item_type item_type; + int ret; + uint16_t tpid; for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { if (item->last) { @@ -1361,8 +1367,23 @@ i40e_flow_parse_ethertype_pattern(struct rte_eth_dev *dev, if (filter->ether_type == RTE_ETHER_TYPE_IPV4 || filter->ether_type == RTE_ETHER_TYPE_IPV6 || - filter->ether_type == RTE_ETHER_TYPE_LLDP || - filter->ether_type == i40e_get_outer_vlan(dev)) { + filter->ether_type == RTE_ETHER_TYPE_LLDP) { + rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM, + item, + "Unsupported ether_type in control packet filter."); + return -rte_errno; + } + + ret = i40e_get_outer_vlan(dev, &tpid); + if (ret != 0) { + rte_flow_error_set(error, EIO, + RTE_FLOW_ERROR_TYPE_ITEM, + item, + "Can not get the Ethertype identifying the L2 tag"); + return -rte_errno; + } + if (filter->ether_type == tpid) { rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, item, @@ -1370,6 +1391,7 @@ i40e_flow_parse_ethertype_pattern(struct rte_eth_dev *dev, " control packet filter."); return -rte_errno; } + break; default: break; @@ -1641,6 +1663,7 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev, bool outer_ip = true; uint8_t field_idx; int ret; + uint16_t tpid; memset(off_arr, 0, sizeof(off_arr)); memset(len_arr, 0, sizeof(len_arr)); @@ -1709,14 +1732,29 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev, ether_type = rte_be_to_cpu_16(eth_spec->hdr.ether_type); if (ether_type == RTE_ETHER_TYPE_IPV4 || - ether_type == RTE_ETHER_TYPE_IPV6 || - ether_type == i40e_get_outer_vlan(dev)) { + ether_type == RTE_ETHER_TYPE_IPV6) { rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, item, "Unsupported ether_type."); return -rte_errno; } + ret = i40e_get_outer_vlan(dev, &tpid); + if (ret != 0) { + rte_flow_error_set(error, EIO, + RTE_FLOW_ERROR_TYPE_ITEM, + item, + "Can not get the Ethertype identifying the L2 tag"); + return -rte_errno; + } + if (ether_type == tpid) { + rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM, + item, + "Unsupported ether_type."); + return -rte_errno; + } + input_set |= I40E_INSET_LAST_ETHER_TYPE; filter->input.flow.l2_flow.ether_type = eth_spec->hdr.ether_type; @@ -1763,14 +1801,29 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev, rte_be_to_cpu_16(vlan_spec->hdr.eth_proto); if (ether_type == RTE_ETHER_TYPE_IPV4 || - ether_type == RTE_ETHER_TYPE_IPV6 || - ether_type == i40e_get_outer_vlan(dev)) { + ether_type == RTE_ETHER_TYPE_IPV6) { rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, item, "Unsupported inner_type."); return -rte_errno; } + ret = i40e_get_outer_vlan(dev, &tpid); + if (ret != 0) { + rte_flow_error_set(error, EIO, + RTE_FLOW_ERROR_TYPE_ITEM, + item, + "Can not get the Ethertype identifying the L2 tag"); + return -rte_errno; + } + if (ether_type == tpid) { + rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM, + item, + "Unsupported ether_type."); + return -rte_errno; + } + input_set |= I40E_INSET_LAST_ETHER_TYPE; filter->input.flow.l2_flow.ether_type = vlan_spec->hdr.eth_proto; -- 2.34.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2024-12-06 23:26:46.712168903 +0800 +++ 0078-net-i40e-check-register-read-for-outer-VLAN.patch 2024-12-06 23:26:44.083044826 +0800 @@ -1 +1 @@ -From c11c52dd5d2a19c97616ac32a1d4911c48f157d4 Mon Sep 17 00:00:00 2001 +From fc13431853e9c89003bf6262a51b7eb935963852 Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Xueming Li + +[ upstream commit c11c52dd5d2a19c97616ac32a1d4911c48f157d4 ] @@ -19 +21,0 @@ -Cc: stable@dpdk.org @@ -28 +30 @@ -index c6857727e8..cd598431e1 100644 +index 92165c8422..273cb2d80c 100644