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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by DS3PEPF000099E2.mail.protection.outlook.com (10.167.17.201) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8606.22 via Frontend Transport; Tue, 8 Apr 2025 08:11:32 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Tue, 8 Apr 2025 01:11:21 -0700 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Tue, 8 Apr 2025 01:11:19 -0700 From: Xueming Li To: Maayan Kashani CC: Xueming Li , Dariusz Sosnowski , dpdk stable Subject: patch 'net/mlx5: fix hairpin queue release' has been queued to stable release 23.11.4 Date: Tue, 8 Apr 2025 16:10:41 +0800 Message-ID: <20250408081054.375502-3-xuemingl@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250408081054.375502-1-xuemingl@nvidia.com> References: <20250218123523.36836-1-xuemingl@nvidia.com> <20250408081054.375502-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099E2:EE_|PH7PR12MB6491:EE_ X-MS-Office365-Filtering-Correlation-Id: 9796c445-800d-47bb-a228-08dd7674f93f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230040)(376014)(36860700013)(1800799024)(82310400026)(13003099007); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Apr 2025 08:11:32.5365 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9796c445-800d-47bb-a228-08dd7674f93f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099E2.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6491 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 23.11.4 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 04/10/25. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging This queued commit can be viewed at: https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=59d1fbfd973b943ac420afe477c84bfd9afd0533 Thanks. Xueming Li --- >From 59d1fbfd973b943ac420afe477c84bfd9afd0533 Mon Sep 17 00:00:00 2001 From: Maayan Kashani Date: Thu, 27 Feb 2025 12:14:14 +0200 Subject: [PATCH] net/mlx5: fix hairpin queue release Cc: Xueming Li [ upstream commit 6886b5f39d66770fb7e233fa1c8fc74ed1935116 ] Fix an assert failure that occurs when releasing a hairpin queue. The issue arises from incorrect handling of shared Rx queues during release. Fixes: 09c2555303be ("net/mlx5: support shared Rx queue") Signed-off-by: Maayan Kashani Acked-by: Dariusz Sosnowski --- drivers/net/mlx5/mlx5.h | 1 + drivers/net/mlx5/mlx5_flow.c | 4 ++-- drivers/net/mlx5/mlx5_rx.h | 1 + drivers/net/mlx5/mlx5_rxq.c | 12 ++++++++---- 4 files changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 55c29e31a2..a9129bf61b 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -1886,6 +1886,7 @@ struct mlx5_priv { uint32_t ctrl_flows; /* Control flow rules. */ rte_spinlock_t flow_list_lock; struct mlx5_obj_ops obj_ops; /* HW objects operations. */ + LIST_HEAD(rxq, mlx5_rxq_ctrl) rxqsctrl; /* DPDK Rx queues. */ LIST_HEAD(rxqobj, mlx5_rxq_obj) rxqsobj; /* Verbs/DevX Rx queues. */ struct mlx5_list *hrxqs; /* Hash Rx queues. */ LIST_HEAD(txq, mlx5_txq_ctrl) txqsctrl; /* DPDK Tx queues. */ diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index 97f678ff4e..bca16a916b 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -1748,13 +1748,13 @@ flow_rxq_mark_flag_set(struct rte_eth_dev *dev) opriv->domain_id != priv->domain_id || opriv->mark_enabled) continue; - LIST_FOREACH(rxq_ctrl, &opriv->sh->shared_rxqs, share_entry) { + LIST_FOREACH(rxq_ctrl, &opriv->rxqsctrl, next) { rxq_ctrl->rxq.mark = 1; } opriv->mark_enabled = 1; } } else { - LIST_FOREACH(rxq_ctrl, &priv->sh->shared_rxqs, share_entry) { + LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) { rxq_ctrl->rxq.mark = 1; } priv->mark_enabled = 1; diff --git a/drivers/net/mlx5/mlx5_rx.h b/drivers/net/mlx5/mlx5_rx.h index db912adf2a..2205149458 100644 --- a/drivers/net/mlx5/mlx5_rx.h +++ b/drivers/net/mlx5/mlx5_rx.h @@ -151,6 +151,7 @@ struct mlx5_rxq_data { /* RX queue control descriptor. */ struct mlx5_rxq_ctrl { struct mlx5_rxq_data rxq; /* Data path structure. */ + LIST_ENTRY(mlx5_rxq_ctrl) next; /* Pointer to the next element. */ LIST_HEAD(priv, mlx5_rxq_priv) owners; /* Owner rxq list. */ struct mlx5_rxq_obj *obj; /* Verbs/DevX elements. */ struct mlx5_dev_ctx_shared *sh; /* Shared context. */ diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index dccfc4eb36..7b377974d3 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -1037,6 +1037,7 @@ mlx5_rx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t idx, rte_errno = ENOMEM; return -rte_errno; } + rte_atomic_fetch_add_explicit(&rxq_ctrl->ctrl_ref, 1, rte_memory_order_relaxed); DRV_LOG(DEBUG, "port %u adding hairpin Rx queue %u to list", dev->data->port_id, idx); dev->data->rx_queues[idx] = &rxq_ctrl->rxq; @@ -1971,8 +1972,9 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc, tmpl->rxq.shared = 1; tmpl->share_group = conf->share_group; tmpl->share_qid = conf->share_qid; + LIST_INSERT_HEAD(&priv->sh->shared_rxqs, tmpl, share_entry); } - LIST_INSERT_HEAD(&priv->sh->shared_rxqs, tmpl, share_entry); + LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next); rte_atomic_store_explicit(&tmpl->ctrl_ref, 1, rte_memory_order_relaxed); return tmpl; error: @@ -2026,7 +2028,7 @@ mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, struct mlx5_rxq_priv *rxq, tmpl->rxq.idx = idx; rxq->hairpin_conf = *hairpin_conf; mlx5_rxq_ref(dev, idx); - LIST_INSERT_HEAD(&priv->sh->shared_rxqs, tmpl, share_entry); + LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next); rte_atomic_store_explicit(&tmpl->ctrl_ref, 1, rte_memory_order_relaxed); return tmpl; } @@ -2301,7 +2303,9 @@ mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx) if (!rxq_ctrl->is_hairpin) mlx5_mr_btree_free (&rxq_ctrl->rxq.mr_ctrl.cache_bh); - LIST_REMOVE(rxq_ctrl, share_entry); + if (rxq_ctrl->rxq.shared) + LIST_REMOVE(rxq_ctrl, share_entry); + LIST_REMOVE(rxq_ctrl, next); mlx5_free(rxq_ctrl); } dev->data->rx_queues[idx] = NULL; @@ -2327,7 +2331,7 @@ mlx5_rxq_verify(struct rte_eth_dev *dev) struct mlx5_rxq_ctrl *rxq_ctrl; int ret = 0; - LIST_FOREACH(rxq_ctrl, &priv->sh->shared_rxqs, share_entry) { + LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) { DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced", dev->data->port_id, rxq_ctrl->rxq.idx); ++ret; -- 2.34.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2025-04-08 15:39:07.013131230 +0800 +++ 0037-net-mlx5-fix-hairpin-queue-release.patch 2025-04-08 15:39:05.996436559 +0800 @@ -1 +1 @@ -From 6886b5f39d66770fb7e233fa1c8fc74ed1935116 Mon Sep 17 00:00:00 2001 +From 59d1fbfd973b943ac420afe477c84bfd9afd0533 Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Xueming Li + +[ upstream commit 6886b5f39d66770fb7e233fa1c8fc74ed1935116 ] @@ -10 +12,0 @@ -Cc: stable@dpdk.org @@ -22 +24 @@ -index 545ba48b3c..6df99c25e2 100644 +index 55c29e31a2..a9129bf61b 100644 @@ -25 +27 @@ -@@ -2023,6 +2023,7 @@ struct mlx5_priv { +@@ -1886,6 +1886,7 @@ struct mlx5_priv { @@ -34 +36 @@ -index f8b3e504b3..6169ebc13f 100644 +index 97f678ff4e..bca16a916b 100644 @@ -37 +39 @@ -@@ -1648,13 +1648,13 @@ flow_rxq_mark_flag_set(struct rte_eth_dev *dev) +@@ -1748,13 +1748,13 @@ flow_rxq_mark_flag_set(struct rte_eth_dev *dev) @@ -54 +56 @@ -index f80a2e3227..6380895502 100644 +index db912adf2a..2205149458 100644 @@ -57 +59 @@ -@@ -169,6 +169,7 @@ struct __rte_cache_aligned mlx5_rxq_data { +@@ -151,6 +151,7 @@ struct mlx5_rxq_data { @@ -66 +68 @@ -index a5971b5cdd..5cf7d4971b 100644 +index dccfc4eb36..7b377974d3 100644 @@ -77 +79 @@ -@@ -2006,8 +2007,9 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc, +@@ -1971,8 +1972,9 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc, @@ -88 +90 @@ -@@ -2061,7 +2063,7 @@ mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, struct mlx5_rxq_priv *rxq, +@@ -2026,7 +2028,7 @@ mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, struct mlx5_rxq_priv *rxq, @@ -97 +99 @@ -@@ -2336,7 +2338,9 @@ mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx) +@@ -2301,7 +2303,9 @@ mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx) @@ -108 +110 @@ -@@ -2362,7 +2366,7 @@ mlx5_rxq_verify(struct rte_eth_dev *dev) +@@ -2327,7 +2331,7 @@ mlx5_rxq_verify(struct rte_eth_dev *dev)