From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0EEDA46BAE for ; Fri, 18 Jul 2025 21:37:41 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0604840611; Fri, 18 Jul 2025 21:37:41 +0200 (CEST) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mails.dpdk.org (Postfix) with ESMTP id 0FFA240E54 for ; Fri, 18 Jul 2025 21:37:38 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1752867458; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=fiptklwM4riiIxpV9Wv06TYKP9qPJaPnhVcfehBLGwU=; b=XjASXZ+D348rQiJHdh3G7C99vgMXH1nxTIx8uLA5GxFRKRtDTNNqA7Q1JbNKwb3u8OG3pX i3kZFtH4J5qtttNKsO1RRsQWmByPkWknoPHHGYGbFuIAOHLo+iFVfGFoLuACmZkyeB38k6 62/gAbUasvcV7QCBpnWugO0e5XrhBdI= Received: from mx-prod-mc-05.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-386--CO_tTRgMzGT6cnptnsFDw-1; Fri, 18 Jul 2025 15:37:35 -0400 X-MC-Unique: -CO_tTRgMzGT6cnptnsFDw-1 X-Mimecast-MFC-AGG-ID: -CO_tTRgMzGT6cnptnsFDw_1752867455 Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id B0FD019560AB; Fri, 18 Jul 2025 19:37:34 +0000 (UTC) Received: from rh.redhat.com (unknown [10.44.32.40]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 37A8018003FC; Fri, 18 Jul 2025 19:37:32 +0000 (UTC) From: Kevin Traynor To: =?UTF-8?q?Mattias=20R=C3=B6nnblom?= Cc: Jerin Jacob , dpdk stable Subject: patch 'eventdev: fix flag types consistency' has been queued to stable release 24.11.3 Date: Fri, 18 Jul 2025 20:31:09 +0100 Message-ID: <20250718193247.1008129-135-ktraynor@redhat.com> In-Reply-To: <20250718193247.1008129-1-ktraynor@redhat.com> References: <20250718193247.1008129-1-ktraynor@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: dtr5uiHi3ScNbVZZro95hgWaGjL30s1ECJfWi5pOSKI_1752867455 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 24.11.3 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 07/23/25. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/kevintraynor/dpdk-stable This queued commit can be viewed at: https://github.com/kevintraynor/dpdk-stable/commit/a3f90ac8fda920647c60774dbb8daf34aaba7b5b Thanks. Kevin --- >From a3f90ac8fda920647c60774dbb8daf34aaba7b5b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Mattias=20R=C3=B6nnblom?= Date: Thu, 26 Jun 2025 16:18:44 +0200 Subject: [PATCH] eventdev: fix flag types consistency MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit [ upstream commit 3734cf22abf8c467d093dcdc83a025ce1aa186db ] Make RTE_EVENT_DEV_CAP_* flags' type consistent with the rte_event_dev_info.event_dev_cap's type. Make RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT consistent with rte_event_dev_config.event_dev_cfg. Make RTE_EVENT_QUEUE_CFG_* consistent with rte_event_queue_conf.event_queue_cfg. Make RTE_EVENT_PORT_CFG_* consistent with rte_event_port_conf.event_port_cfg. Make RTE_EVENT_TIMER_ADAPTER_CAP_* consistent with the caps parameter in rte_event_eth_rx_adapter_caps_get(). The flags were all unsigned long longs (64 bits), but the event_dev_cap, event_dev_cfg, event_queue_cfg, and event_port_cfg fields and the caps parameter are all uint32_t. This change makes the flags uint32_ts. Fixes: 71f238432865 ("eventdev: introduce event driven programming model") Fixes: 73e6b8c93dca ("eventdev: introduce burst mode capability") Fixes: ec36d881f56d ("eventdev: add implicit release disable capability") Fixes: 29653a7bfec1 ("eventdev: extend capability flags") Fixes: bd99189724b8 ("eventdev: negate maintenance capability flag") Fixes: d007a7f39de3 ("eventdev: introduce link profiles") Fixes: acc65ee307f7 ("eventdev: introduce event pre-scheduling") Fixes: c1bdd86d04d1 ("eventdev: add event port pre-schedule modify") Fixes: acc65ee307f7 ("eventdev: introduce event pre-scheduling") Fixes: 47d05b292820 ("eventdev: add timer adapter common code") Signed-off-by: Mattias Rönnblom Reviewed-by: Jerin Jacob --- lib/eventdev/rte_eventdev.h | 67 +++++++++++++++++++------------------ 1 file changed, 34 insertions(+), 33 deletions(-) diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h index fabd1490db..7649882b53 100644 --- a/lib/eventdev/rte_eventdev.h +++ b/lib/eventdev/rte_eventdev.h @@ -238,6 +238,7 @@ */ -#include +#include #include +#include #include #include @@ -250,5 +251,5 @@ struct rte_event; /* Event device capability bitmap flags */ -#define RTE_EVENT_DEV_CAP_QUEUE_QOS (1ULL << 0) +#define RTE_EVENT_DEV_CAP_QUEUE_QOS RTE_BIT32(0) /**< Event scheduling prioritization is based on the priority and weight * associated with each event queue. @@ -268,5 +269,5 @@ struct rte_event; * @see rte_event_queue_attr_set() */ -#define RTE_EVENT_DEV_CAP_EVENT_QOS (1ULL << 1) +#define RTE_EVENT_DEV_CAP_EVENT_QOS RTE_BIT32(1) /**< Event scheduling prioritization is based on the priority associated with * each event. @@ -282,5 +283,5 @@ struct rte_event; * @see rte_event_enqueue_burst() */ -#define RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED (1ULL << 2) +#define RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED RTE_BIT32(2) /**< Event device operates in distributed scheduling mode. * @@ -292,5 +293,5 @@ struct rte_event; * @see rte_event_dev_service_id_get() */ -#define RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES (1ULL << 3) +#define RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES RTE_BIT32(3) /**< Event device is capable of accepting enqueued events, of any type * advertised as supported by the device, to all destination queues. @@ -316,5 +317,5 @@ struct rte_event; * @see rte_event_enqueue_burst() */ -#define RTE_EVENT_DEV_CAP_BURST_MODE (1ULL << 4) +#define RTE_EVENT_DEV_CAP_BURST_MODE RTE_BIT32(4) /**< Event device is capable of operating in burst mode for enqueue(forward, * release) and dequeue operation. @@ -327,5 +328,5 @@ struct rte_event; * @see rte_event_enqueue_burst() */ -#define RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE (1ULL << 5) +#define RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE RTE_BIT32(5) /**< Event device ports support disabling the implicit release feature, in * which the port will release all unreleased events in its dequeue operation. @@ -340,5 +341,5 @@ struct rte_event; */ -#define RTE_EVENT_DEV_CAP_NONSEQ_MODE (1ULL << 6) +#define RTE_EVENT_DEV_CAP_NONSEQ_MODE RTE_BIT32(6) /**< Event device is capable of operating in non-sequential mode. * @@ -352,5 +353,5 @@ struct rte_event; */ -#define RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK (1ULL << 7) +#define RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK RTE_BIT32(7) /**< Event device is capable of reconfiguring the queue/port link at runtime. * @@ -363,5 +364,5 @@ struct rte_event; */ -#define RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT (1ULL << 8) +#define RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT RTE_BIT32(8) /**< Event device is capable of setting up links between multiple queues and a single port. * @@ -373,5 +374,5 @@ struct rte_event; */ -#define RTE_EVENT_DEV_CAP_CARRY_FLOW_ID (1ULL << 9) +#define RTE_EVENT_DEV_CAP_CARRY_FLOW_ID RTE_BIT32(9) /**< Event device preserves the flow ID from the enqueued event to the dequeued event. * @@ -382,5 +383,5 @@ struct rte_event; */ -#define RTE_EVENT_DEV_CAP_MAINTENANCE_FREE (1ULL << 10) +#define RTE_EVENT_DEV_CAP_MAINTENANCE_FREE RTE_BIT32(10) /**< Event device *does not* require calls to rte_event_maintain(). * @@ -395,5 +396,5 @@ struct rte_event; */ -#define RTE_EVENT_DEV_CAP_RUNTIME_QUEUE_ATTR (1ULL << 11) +#define RTE_EVENT_DEV_CAP_RUNTIME_QUEUE_ATTR RTE_BIT32(11) /**< Event device is capable of changing the queue attributes at runtime i.e * after rte_event_queue_setup() or rte_event_dev_start() call sequence. @@ -405,5 +406,5 @@ struct rte_event; */ -#define RTE_EVENT_DEV_CAP_PROFILE_LINK (1ULL << 12) +#define RTE_EVENT_DEV_CAP_PROFILE_LINK RTE_BIT32(12) /**< Event device is capable of supporting multiple link profiles per event port. * @@ -419,5 +420,5 @@ struct rte_event; */ -#define RTE_EVENT_DEV_CAP_ATOMIC (1ULL << 13) +#define RTE_EVENT_DEV_CAP_ATOMIC RTE_BIT32(13) /**< Event device is capable of atomic scheduling. * When this flag is set, the application can configure queues with scheduling type @@ -427,5 +428,5 @@ struct rte_event; */ -#define RTE_EVENT_DEV_CAP_ORDERED (1ULL << 14) +#define RTE_EVENT_DEV_CAP_ORDERED RTE_BIT32(14) /**< Event device is capable of ordered scheduling. * When this flag is set, the application can configure queues with scheduling type @@ -435,5 +436,5 @@ struct rte_event; */ -#define RTE_EVENT_DEV_CAP_PARALLEL (1ULL << 15) +#define RTE_EVENT_DEV_CAP_PARALLEL RTE_BIT32(15) /**< Event device is capable of parallel scheduling. * When this flag is set, the application can configure queues with scheduling type @@ -443,5 +444,5 @@ struct rte_event; */ -#define RTE_EVENT_DEV_CAP_INDEPENDENT_ENQ (1ULL << 16) +#define RTE_EVENT_DEV_CAP_INDEPENDENT_ENQ RTE_BIT32(16) /**< Event device is capable of independent enqueue. * A new capability, RTE_EVENT_DEV_CAP_INDEPENDENT_ENQ, will indicate that Eventdev @@ -462,5 +463,5 @@ struct rte_event; */ -#define RTE_EVENT_DEV_CAP_EVENT_PRESCHEDULE (1ULL << 17) +#define RTE_EVENT_DEV_CAP_EVENT_PRESCHEDULE RTE_BIT32(17) /**< Event device supports event pre-scheduling. * @@ -474,5 +475,5 @@ struct rte_event; */ -#define RTE_EVENT_DEV_CAP_EVENT_PRESCHEDULE_ADAPTIVE (1ULL << 18) +#define RTE_EVENT_DEV_CAP_EVENT_PRESCHEDULE_ADAPTIVE RTE_BIT32(18) /**< Event device supports adaptive event pre-scheduling. * @@ -486,5 +487,5 @@ struct rte_event; */ -#define RTE_EVENT_DEV_CAP_PER_PORT_PRESCHEDULE (1ULL << 19) +#define RTE_EVENT_DEV_CAP_PER_PORT_PRESCHEDULE RTE_BIT32(19) /**< Event device supports event pre-scheduling per event port. * @@ -496,5 +497,5 @@ struct rte_event; */ -#define RTE_EVENT_DEV_CAP_PRESCHEDULE_EXPLICIT (1ULL << 20) +#define RTE_EVENT_DEV_CAP_PRESCHEDULE_EXPLICIT RTE_BIT32(20) /**< Event device supports explicit pre-scheduling. * @@ -734,5 +735,5 @@ rte_event_dev_attr_get(uint8_t dev_id, uint32_t attr_id, /* Event device configuration bitmap flags */ -#define RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT (1ULL << 0) +#define RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT RTE_BIT32(0) /**< Override the global *dequeue_timeout_ns* and use per dequeue timeout in ns. * @see rte_event_dequeue_timeout_ticks(), rte_event_dequeue_burst() @@ -874,5 +875,5 @@ rte_event_dev_configure(uint8_t dev_id, /* Event queue configuration bitmap flags */ -#define RTE_EVENT_QUEUE_CFG_ALL_TYPES (1ULL << 0) +#define RTE_EVENT_QUEUE_CFG_ALL_TYPES RTE_BIT32(0) /**< Allow events with schedule types ATOMIC, ORDERED, and PARALLEL to be enqueued to this queue. * @@ -888,5 +889,5 @@ rte_event_dev_configure(uint8_t dev_id, * @see rte_event_enqueue_burst() */ -#define RTE_EVENT_QUEUE_CFG_SINGLE_LINK (1ULL << 1) +#define RTE_EVENT_QUEUE_CFG_SINGLE_LINK RTE_BIT32(1) /**< This event queue links only to a single event port. * @@ -1114,5 +1115,5 @@ rte_event_queue_attr_set(uint8_t dev_id, uint8_t queue_id, uint32_t attr_id, /* Event port configuration bitmap flags */ -#define RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL (1ULL << 0) +#define RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL RTE_BIT32(0) /**< Configure the port not to release outstanding events in * rte_event_dev_dequeue_burst(). If set, all events received through @@ -1121,5 +1122,5 @@ rte_event_queue_attr_set(uint8_t dev_id, uint8_t queue_id, uint32_t attr_id, * RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE capable. */ -#define RTE_EVENT_PORT_CFG_SINGLE_LINK (1ULL << 1) +#define RTE_EVENT_PORT_CFG_SINGLE_LINK RTE_BIT32(1) /**< This event port links only to a single event queue. * The queue it links with should be similarly configured with the @@ -1129,5 +1130,5 @@ rte_event_queue_attr_set(uint8_t dev_id, uint8_t queue_id, uint32_t attr_id, * @see rte_event_port_setup(), rte_event_port_link() */ -#define RTE_EVENT_PORT_CFG_HINT_PRODUCER (1ULL << 2) +#define RTE_EVENT_PORT_CFG_HINT_PRODUCER RTE_BIT32(2) /**< Hint that this event port will primarily enqueue events to the system. * A PMD can optimize its internal workings by assuming that this port is @@ -1139,5 +1140,5 @@ rte_event_queue_attr_set(uint8_t dev_id, uint8_t queue_id, uint32_t attr_id, * @see rte_event_port_setup() */ -#define RTE_EVENT_PORT_CFG_HINT_CONSUMER (1ULL << 3) +#define RTE_EVENT_PORT_CFG_HINT_CONSUMER RTE_BIT32(3) /**< Hint that this event port will primarily dequeue events from the system. * A PMD can optimize its internal workings by assuming that this port is @@ -1150,5 +1151,5 @@ rte_event_queue_attr_set(uint8_t dev_id, uint8_t queue_id, uint32_t attr_id, * @see rte_event_port_setup() */ -#define RTE_EVENT_PORT_CFG_HINT_WORKER (1ULL << 4) +#define RTE_EVENT_PORT_CFG_HINT_WORKER RTE_BIT32(4) /**< Hint that this event port will primarily pass existing events through. * A PMD can optimize its internal workings by assuming that this port is @@ -1161,5 +1162,5 @@ rte_event_queue_attr_set(uint8_t dev_id, uint8_t queue_id, uint32_t attr_id, * @see rte_event_port_setup() */ -#define RTE_EVENT_PORT_CFG_INDEPENDENT_ENQ (1ULL << 5) +#define RTE_EVENT_PORT_CFG_INDEPENDENT_ENQ RTE_BIT32(5) /**< Flag to enable independent enqueue. Must not be set if the device * is not RTE_EVENT_DEV_CAP_INDEPENDENT_ENQ capable. This feature @@ -1836,8 +1837,8 @@ rte_event_eth_rx_adapter_caps_get(uint8_t dev_id, uint16_t eth_port_id, uint32_t *caps); -#define RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT (1ULL << 0) +#define RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT RTE_BIT32(0) /**< This flag is set when the timer mechanism is in HW. */ -#define RTE_EVENT_TIMER_ADAPTER_CAP_PERIODIC (1ULL << 1) +#define RTE_EVENT_TIMER_ADAPTER_CAP_PERIODIC RTE_BIT32(1) /**< This flag is set if periodic mode is supported. */ -- 2.50.0 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2025-07-18 20:29:15.770179227 +0100 +++ 0135-eventdev-fix-flag-types-consistency.patch 2025-07-18 20:29:11.095907837 +0100 @@ -1 +1 @@ -From 3734cf22abf8c467d093dcdc83a025ce1aa186db Mon Sep 17 00:00:00 2001 +From a3f90ac8fda920647c60774dbb8daf34aaba7b5b Mon Sep 17 00:00:00 2001 @@ -8,0 +9,2 @@ +[ upstream commit 3734cf22abf8c467d093dcdc83a025ce1aa186db ] + @@ -39 +40,0 @@ -Cc: stable@dpdk.org @@ -48 +49 @@ -index 3c7fcbf0be..88c52a5520 100644 +index fabd1490db..7649882b53 100644 @@ -270 +271 @@ -@@ -1840,8 +1841,8 @@ rte_event_eth_rx_adapter_caps_get(uint8_t dev_id, uint16_t eth_port_id, +@@ -1836,8 +1837,8 @@ rte_event_eth_rx_adapter_caps_get(uint8_t dev_id, uint16_t eth_port_id,