From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BE95A46C54 for ; Wed, 30 Jul 2025 17:00:56 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B7B0B40E78; Wed, 30 Jul 2025 17:00:56 +0200 (CEST) Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on2042.outbound.protection.outlook.com [40.107.243.42]) by mails.dpdk.org (Postfix) with ESMTP id 6C71E40E78 for ; Wed, 30 Jul 2025 17:00:55 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=wKGAorRjPKldbLtTfD5uW1PHQOrSFM1IZAWO25AlRIKq4EsLVKCySzz/0CbJZ1nDdqdvjkurc6Qm4fvHBfBq41nrPcXAy5RNdNm2LgAwdwaJ6h0qgwS8DLGLdUTErCdL2tt8DAvA4kGm4X8O+WygG2fuqmGJu9unIB2DNij6v7Hc0/UFFihIAjJkZNDUsmDIww0thNmfVNuQcqxa3a//n/HkDJHz/fxfcRJZ71YCERKc60GWNlmoMUHXAGJmDxBN45UQDBBpdbtTDyLl5Bo/PIjZpPLjICzFCb0LmlFHstiIvc0nNTjx3Rm505ODX1exLcYVF6Fdjjzi+tNMMb4Wtw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=904I9WIWUGL9XZue628Wlk5YeO0alGF3n/JcMC/tC0k=; b=bkmL6El81cD+FawJfKd8fWQ0XCDTTFT16071anbLiLXSgGBBUY1S1HcyIz2TEara79Pxx8zkuFkVi2l4x25G0XHP9JnINm5eRgp4GpX7vkevCvOwNh8piL78U8UHaKpcW5zO1G7VqbSI5w857YqyJQBBnCj700hC3DnLHcWFwTpa8dF/1aj3tbAjJkLcQSCWMEf/22TCHm+t/mSoghvXd+1ycoqNGEKXLitSaCkGE71pg7AFzAp+4ZGRi6KDCrkWnnugDr718pesC+Mdkx8vaTin43QMuLu7vZ4dOWL4cYnEGB0HyYjUpZL/Bn2KqijA3OZsW52vSQhLTDEiKNnfUQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=marvell.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=904I9WIWUGL9XZue628Wlk5YeO0alGF3n/JcMC/tC0k=; b=uNPCk+oboHOmeAZnUUK6pyYI2wFjHsXhWMxwH7xyH9EVVq0DWBH0xKgySwVFFa07+tdUVR8ImOI7cHA2JsaS6B2D1RZa8lTTG0kTFlYGnqLZ5pPoKixptcXhgCu7eAsWfFy1FfN90ET23eAUyCLbAjjzdWDGgNHlK+lEdg9wWJ3EouHcga0j4FkeFGLNsU2UNA1Kq4h9njf+ys8H/4i7Tr6qSr/WqtSdh+smHmw0UHkXTkVUtaH+vuxHb5y6tsM622Xru3uoPdumL0nn72KhrSnQIHjbcL3wDvLZUe6WA+cMlTNzkvALH2LbZY7AH5bRlTK9Y/TmSlsxbi+LyDx75Q== Received: from BL6PEPF00016414.NAMP222.PROD.OUTLOOK.COM (2603:10b6:22e:400:0:1004:0:c) by IA0PR12MB8301.namprd12.prod.outlook.com (2603:10b6:208:40b::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8989.12; Wed, 30 Jul 2025 15:00:49 +0000 Received: from BL6PEPF00022574.namprd02.prod.outlook.com (2a01:111:f403:f903::2) by BL6PEPF00016414.outlook.office365.com (2603:1036:903:4::a) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.8943.21 via Frontend Transport; Wed, 30 Jul 2025 15:00:49 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BL6PEPF00022574.mail.protection.outlook.com (10.167.249.42) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8989.10 via Frontend Transport; Wed, 30 Jul 2025 15:00:48 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Wed, 30 Jul 2025 08:00:23 -0700 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Wed, 30 Jul 2025 08:00:16 -0700 From: Xueming Li To: Nithinsen Kaithakadan CC: Xueming Li , dpdk stable Subject: patch 'common/cnxk: fix qsize in CPT iq enable' has been queued to stable release 23.11.5 Date: Wed, 30 Jul 2025 22:56:22 +0800 Message-ID: <20250730145633.245984-14-xuemingl@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730145633.245984-1-xuemingl@nvidia.com> References: <20250626120145.27369-1-xuemingl@nvidia.com> <20250730145633.245984-1-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00022574:EE_|IA0PR12MB8301:EE_ X-MS-Office365-Filtering-Correlation-Id: 28e61470-f866-4a62-e98a-08ddcf79debc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|82310400026|36860700013|376014|7053199007; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?UYxVcaj0cmdjuH0YEedhwmtNYeaeci/9zPBQ/uRyArzJJIOWVfya6AeeHdd5?= =?us-ascii?Q?ArR4CYUIHdb9jEMHs8oi7Oavil5OgBfMlBdj5nYEzSDmaHkzcufcGy5vCUdq?= =?us-ascii?Q?BUypEWGyD1/g8KCDdxAfGvuJfW2ruRW3zsULcpVzk9uIV4T38aEZccWGefk1?= =?us-ascii?Q?tCrxjfxCwqMj6NAZGiC/mS8i5mcHs90luT8Oa3P9r7auVOuiyxOYsjFJjDPd?= =?us-ascii?Q?wP/mbVQbviYzrABPn3pH8iVg/VoK+BLGZXdQxKBdNSb7F0SGw+TfZIBf6/t6?= =?us-ascii?Q?FtbK3uNRhOpnVsFuXMxyhnuDjFwanPfhqYYh0ffgZZmBd8Vduul/unOZ9GON?= =?us-ascii?Q?6QWfAqHB9CryndgRcMfYkxZ5MLcL86ocQl4LNpc5MujowAu4FP+s/jb8K2GB?= =?us-ascii?Q?N/rMsLRiwli8Xpwi2IEYRiffjc4dcNvi9yaMcLpjxo/FtYbqv07iNYoIxXlZ?= =?us-ascii?Q?Smy2PUvHfUANd3IFTy+G2XuDQwsa/O8c6WoS+AwFHfOKq42Tcn3wMCK54mtZ?= =?us-ascii?Q?98N5OpFC/aqPD9hI5VpSXEklJkMZzQyAQDuKLIgL9/mNp+Je68LnCueslkLv?= =?us-ascii?Q?YoG1mh7gPbM8ESPX5HIxCE40UQ35xvjRa9+5IYYW+SgruGrt3cBNYaY/sVSk?= =?us-ascii?Q?QjgiA1o3qExygv17FWAdo2vrA9xuRWLZWHxvXctfGHU40InRCMV8AsspS39I?= =?us-ascii?Q?PMdIiJ8XEUkfDT/zWEwo22W8ebNkEohCzHNw9+8HIqQmvteMl9Uhdscdob8B?= =?us-ascii?Q?fUmaDMEepFnEE/s6d96V6rR0FFcw5blRLJrbqpjoN217Tb3X5mkbQMX94rhq?= =?us-ascii?Q?3sCWNJUld9eCxOdrZaSqWujwcCbGuMwBisCMZ/XTCIFSIemAEllDI1Jln5PN?= =?us-ascii?Q?qB5n/ch5e4CM4BJfuQIELYMRPCQzIU11TmRDH6LFLe/cVrurIkmbkjFxR6+e?= =?us-ascii?Q?eJwdTCz2silQs0AL+GGfyodYAuC5OwIH0kU8Zl44SDZvnKxuh0aW8Aerqse0?= =?us-ascii?Q?evslSLF+66AcDZEUbvYw2S7K4Tyv1AFS9qyNNkJ7WdOQzCWUrBZ7HgHn5d7S?= =?us-ascii?Q?oUnlE++EoR6rurp9QBy7WK4aqdEUtjeoGQSH02sTMAu/h6g9kSNcIQufcwmL?= =?us-ascii?Q?7dOJ6OcIoNR8DWa0qHRTajhihwFQO7iODkD6mUIaIHzr0qZ7CuF6Npo5eMYR?= =?us-ascii?Q?xjB/b4PUCNaAFW24ObBmRngUzq1gEZwfG2zaj9oxjIDWlAV91aZak8oAIFlH?= =?us-ascii?Q?A3Geo/GVBz++esAlgtAA2xRIMlRR2OdS/pmiWJYH94a7gsHdz7v+7HwFOc+m?= =?us-ascii?Q?BnMxTIz1iM4Aj8crdu5hCGTLhnqwcl0OrXvSyWKjqTYg82iZ2SEsHCf7Myw1?= =?us-ascii?Q?+4im6vnMWZx9A8/DQIVAtQbYZX1EqECJ4TM9cVYo0UJJp9IxUfI1Ewrp7TWW?= =?us-ascii?Q?NtN0vvP1GugFEBaYXF7Jm0r7lHOFLqV5mFvUCqW6pRZfwNV6+jCpihC1FG8C?= =?us-ascii?Q?7l/FoG2awajJJRY9vF0jldioelA3CAyNjz7c?= X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014)(7053199007); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Jul 2025 15:00:48.9597 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 28e61470-f866-4a62-e98a-08ddcf79debc X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00022574.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8301 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 23.11.5 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 08/10/25. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging This queued commit can be viewed at: https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=05e3fe5cd1c7ea284a5eba83a16b4789d9c99730 Thanks. Xueming Li --- >From 05e3fe5cd1c7ea284a5eba83a16b4789d9c99730 Mon Sep 17 00:00:00 2001 From: Nithinsen Kaithakadan Date: Mon, 9 Jun 2025 16:10:37 +0530 Subject: [PATCH] common/cnxk: fix qsize in CPT iq enable Cc: Xueming Li [ upstream commit 8c60a3ff2367e4c1189fac431ccb046107b91357 ] Reconfigure qsize in each CPT iq enable call. Fixes: 3bf878395591 ("common/cnxk: move instruction queue enable to ROC") Cc: stable@dpdk.org Signed-off-by: Nithinsen Kaithakadan --- drivers/common/cnxk/roc_cpt.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c index 4e23d8c135..a3925dcedf 100644 --- a/drivers/common/cnxk/roc_cpt.c +++ b/drivers/common/cnxk/roc_cpt.c @@ -1102,9 +1102,14 @@ roc_cpt_iq_disable(struct roc_cpt_lf *lf) void roc_cpt_iq_enable(struct roc_cpt_lf *lf) { + union cpt_lf_q_size lf_q_size; union cpt_lf_inprog lf_inprog; union cpt_lf_ctl lf_ctl; + /* Reconfigure the QSIZE register to ensure NQ_PTR and DQ_PTR are reset */ + lf_q_size.u = plt_read64(lf->rbase + CPT_LF_Q_SIZE); + plt_write64(lf_q_size.u, lf->rbase + CPT_LF_Q_SIZE); + /* Disable command queue */ roc_cpt_iq_disable(lf); -- 2.34.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2025-07-30 22:50:03.947869716 +0800 +++ 0013-common-cnxk-fix-qsize-in-CPT-iq-enable.patch 2025-07-30 22:50:03.012754407 +0800 @@ -1 +1 @@ -From 8c60a3ff2367e4c1189fac431ccb046107b91357 Mon Sep 17 00:00:00 2001 +From 05e3fe5cd1c7ea284a5eba83a16b4789d9c99730 Mon Sep 17 00:00:00 2001 @@ -4,0 +5,3 @@ +Cc: Xueming Li + +[ upstream commit 8c60a3ff2367e4c1189fac431ccb046107b91357 ] @@ -17 +20 @@ -index b4bf0ccd64..d1ba2b8858 100644 +index 4e23d8c135..a3925dcedf 100644 @@ -20 +23 @@ -@@ -1125,9 +1125,14 @@ roc_cpt_iq_disable(struct roc_cpt_lf *lf) +@@ -1102,9 +1102,14 @@ roc_cpt_iq_disable(struct roc_cpt_lf *lf)