From: Gregory Etelson <getelson@nvidia.com>
To: <dev@dpdk.org>
Cc: <getelson@nvidia.com>, <mkashani@nvidia.com>,
<rasland@nvidia.com>, <stable@dpdk.org>,
Dariusz Sosnowski <dsosnowski@nvidia.com>,
"Viacheslav Ovsiienko" <viacheslavo@nvidia.com>,
Bing Zhao <bingz@nvidia.com>, Ori Kam <orika@nvidia.com>,
Suanming Mou <suanmingm@nvidia.com>,
Matan Azrad <matan@nvidia.com>
Subject: [PATCH] net/mlx5: fix register selection for metadata between E-Switch and VM
Date: Mon, 1 Dec 2025 19:36:27 +0200 [thread overview]
Message-ID: <20251201173628.266032-1-getelson@nvidia.com> (raw)
The PMD relied on a flow domain type in register selection for
modify header action that assigned metadata value.
In the HWS code, the PMD uses the MLX5DR_TABLE_TYPE_MAX instead of
the exact domain type for flows in group 0.
As a result, the register selection was wrong.
This patch fixes the register selection logic when flow metadata
sharing between E-Switch and VM is enabled.
In this case REG_C_1 will always be used.
Fixes: a78425ba3793 ("net/mlx5: support flow metadata between E-Switch and VM")
Cc: stable@dpdk.org
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
---
drivers/net/mlx5/mlx5_flow.h | 20 +++++++++++---------
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 218b55d536..09084d311e 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -1794,6 +1794,13 @@ mlx5_multi_pattern_segment_find(struct rte_flow_template_table *table,
return NULL;
}
+static inline bool
+mlx5_esw_hws_xmeta_mode_meta32_enabled(const struct mlx5_dev_ctx_shared *sh)
+{
+ return sh->config.dv_esw_en &&
+ (sh->config.dv_xmeta_en == MLX5_XMETA_MODE_META32_HWS);
+}
+
/*
* Convert metadata or tag to the actual register.
* META: Fixed C_1 for FDB mode, REG_A for NIC TX and REG_B for NIC RX.
@@ -1809,15 +1816,10 @@ flow_hw_get_reg_id_by_domain(struct rte_eth_dev *dev,
switch (type) {
case RTE_FLOW_ITEM_TYPE_META:
- if (sh->config.dv_esw_en &&
- (sh->config.dv_xmeta_en == MLX5_XMETA_MODE_META32_HWS ||
- mlx5_esw_metadata_passing_enabled(sh))) {
- return REG_C_1;
- }
- if ((mlx5_vport_rx_metadata_passing_enabled(sh) &&
- domain_type == MLX5DR_TABLE_TYPE_NIC_RX) ||
- (mlx5_vport_tx_metadata_passing_enabled(sh) &&
- domain_type == MLX5DR_TABLE_TYPE_NIC_TX))
+ if (mlx5_esw_hws_xmeta_mode_meta32_enabled(sh) ||
+ mlx5_esw_metadata_passing_enabled(sh) ||
+ mlx5_vport_rx_metadata_passing_enabled(sh) ||
+ mlx5_vport_tx_metadata_passing_enabled(sh))
return REG_C_1;
/*
* On root table - PMD allows only egress META matching, thus
--
2.51.0
reply other threads:[~2025-12-01 17:37 UTC|newest]
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